py32f0/py32f030/rtc/
rtccr.rs

1///Register `RTCCR` reader
2pub struct R(crate::R<RTCCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<RTCCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<RTCCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<RTCCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `RTCCR` writer
17pub struct W(crate::W<RTCCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<RTCCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<RTCCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<RTCCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `CAL` reader - Calibration value
38pub type CAL_R = crate::FieldReader<u8, u8>;
39///Field `CAL` writer - Calibration value
40pub type CAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RTCCR_SPEC, u8, u8, 7, O>;
41///Field `CCO` reader - Calibration clock output
42pub type CCO_R = crate::BitReader<CCO_A>;
43/**Calibration clock output
44
45Value on reset: 0*/
46#[derive(Clone, Copy, Debug, PartialEq, Eq)]
47pub enum CCO_A {
48    ///0: Calibration clock output disabled
49    Disabled = 0,
50    ///1: Setting this bit output calibration clock (RTC clock / 64) on the pin
51    Enabled = 1,
52}
53impl From<CCO_A> for bool {
54    #[inline(always)]
55    fn from(variant: CCO_A) -> Self {
56        variant as u8 != 0
57    }
58}
59impl CCO_R {
60    ///Get enumerated values variant
61    #[inline(always)]
62    pub fn variant(&self) -> CCO_A {
63        match self.bits {
64            false => CCO_A::Disabled,
65            true => CCO_A::Enabled,
66        }
67    }
68    ///Checks if the value of the field is `Disabled`
69    #[inline(always)]
70    pub fn is_disabled(&self) -> bool {
71        *self == CCO_A::Disabled
72    }
73    ///Checks if the value of the field is `Enabled`
74    #[inline(always)]
75    pub fn is_enabled(&self) -> bool {
76        *self == CCO_A::Enabled
77    }
78}
79///Field `CCO` writer - Calibration clock output
80pub type CCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, RTCCR_SPEC, CCO_A, O>;
81impl<'a, const O: u8> CCO_W<'a, O> {
82    ///Calibration clock output disabled
83    #[inline(always)]
84    pub fn disabled(self) -> &'a mut W {
85        self.variant(CCO_A::Disabled)
86    }
87    ///Setting this bit output calibration clock (RTC clock / 64) on the pin
88    #[inline(always)]
89    pub fn enabled(self) -> &'a mut W {
90        self.variant(CCO_A::Enabled)
91    }
92}
93///Field `ASOE` reader - Alarm or second output enable
94pub type ASOE_R = crate::BitReader<ASOE_A>;
95/**Alarm or second output enable
96
97Value on reset: 0*/
98#[derive(Clone, Copy, Debug, PartialEq, Eq)]
99pub enum ASOE_A {
100    ///0: Disabled
101    Disabled = 0,
102    ///1: Setting this bit outputs either the RTC Alarm pulse signal or the Second pulse signal on the TAMPER pin depending on the ASOS bit
103    Enabled = 1,
104}
105impl From<ASOE_A> for bool {
106    #[inline(always)]
107    fn from(variant: ASOE_A) -> Self {
108        variant as u8 != 0
109    }
110}
111impl ASOE_R {
112    ///Get enumerated values variant
113    #[inline(always)]
114    pub fn variant(&self) -> ASOE_A {
115        match self.bits {
116            false => ASOE_A::Disabled,
117            true => ASOE_A::Enabled,
118        }
119    }
120    ///Checks if the value of the field is `Disabled`
121    #[inline(always)]
122    pub fn is_disabled(&self) -> bool {
123        *self == ASOE_A::Disabled
124    }
125    ///Checks if the value of the field is `Enabled`
126    #[inline(always)]
127    pub fn is_enabled(&self) -> bool {
128        *self == ASOE_A::Enabled
129    }
130}
131///Field `ASOE` writer - Alarm or second output enable
132pub type ASOE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RTCCR_SPEC, ASOE_A, O>;
133impl<'a, const O: u8> ASOE_W<'a, O> {
134    ///Disabled
135    #[inline(always)]
136    pub fn disabled(self) -> &'a mut W {
137        self.variant(ASOE_A::Disabled)
138    }
139    ///Setting this bit outputs either the RTC Alarm pulse signal or the Second pulse signal on the TAMPER pin depending on the ASOS bit
140    #[inline(always)]
141    pub fn enabled(self) -> &'a mut W {
142        self.variant(ASOE_A::Enabled)
143    }
144}
145///Field `ASOS` reader - Alarm or second output selection
146pub type ASOS_R = crate::BitReader<ASOS_A>;
147/**Alarm or second output selection
148
149Value on reset: 0*/
150#[derive(Clone, Copy, Debug, PartialEq, Eq)]
151pub enum ASOS_A {
152    ///0: RTC Alarm pulse output selected
153    Alarm = 0,
154    ///1: RTC Second pulse output selected
155    Second = 1,
156}
157impl From<ASOS_A> for bool {
158    #[inline(always)]
159    fn from(variant: ASOS_A) -> Self {
160        variant as u8 != 0
161    }
162}
163impl ASOS_R {
164    ///Get enumerated values variant
165    #[inline(always)]
166    pub fn variant(&self) -> ASOS_A {
167        match self.bits {
168            false => ASOS_A::Alarm,
169            true => ASOS_A::Second,
170        }
171    }
172    ///Checks if the value of the field is `Alarm`
173    #[inline(always)]
174    pub fn is_alarm(&self) -> bool {
175        *self == ASOS_A::Alarm
176    }
177    ///Checks if the value of the field is `Second`
178    #[inline(always)]
179    pub fn is_second(&self) -> bool {
180        *self == ASOS_A::Second
181    }
182}
183///Field `ASOS` writer - Alarm or second output selection
184pub type ASOS_W<'a, const O: u8> = crate::BitWriter<'a, u32, RTCCR_SPEC, ASOS_A, O>;
185impl<'a, const O: u8> ASOS_W<'a, O> {
186    ///RTC Alarm pulse output selected
187    #[inline(always)]
188    pub fn alarm(self) -> &'a mut W {
189        self.variant(ASOS_A::Alarm)
190    }
191    ///RTC Second pulse output selected
192    #[inline(always)]
193    pub fn second(self) -> &'a mut W {
194        self.variant(ASOS_A::Second)
195    }
196}
197impl R {
198    ///Bits 0:6 - Calibration value
199    #[inline(always)]
200    pub fn cal(&self) -> CAL_R {
201        CAL_R::new((self.bits & 0x7f) as u8)
202    }
203    ///Bit 7 - Calibration clock output
204    #[inline(always)]
205    pub fn cco(&self) -> CCO_R {
206        CCO_R::new(((self.bits >> 7) & 1) != 0)
207    }
208    ///Bit 8 - Alarm or second output enable
209    #[inline(always)]
210    pub fn asoe(&self) -> ASOE_R {
211        ASOE_R::new(((self.bits >> 8) & 1) != 0)
212    }
213    ///Bit 9 - Alarm or second output selection
214    #[inline(always)]
215    pub fn asos(&self) -> ASOS_R {
216        ASOS_R::new(((self.bits >> 9) & 1) != 0)
217    }
218}
219impl W {
220    ///Bits 0:6 - Calibration value
221    #[inline(always)]
222    #[must_use]
223    pub fn cal(&mut self) -> CAL_W<0> {
224        CAL_W::new(self)
225    }
226    ///Bit 7 - Calibration clock output
227    #[inline(always)]
228    #[must_use]
229    pub fn cco(&mut self) -> CCO_W<7> {
230        CCO_W::new(self)
231    }
232    ///Bit 8 - Alarm or second output enable
233    #[inline(always)]
234    #[must_use]
235    pub fn asoe(&mut self) -> ASOE_W<8> {
236        ASOE_W::new(self)
237    }
238    ///Bit 9 - Alarm or second output selection
239    #[inline(always)]
240    #[must_use]
241    pub fn asos(&mut self) -> ASOS_W<9> {
242        ASOS_W::new(self)
243    }
244    ///Writes raw bits to the register.
245    #[inline(always)]
246    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
247        self.0.bits(bits);
248        self
249    }
250}
251/**RTC clock calibration
252
253This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
254
255For information about available fields see [rtccr](index.html) module*/
256pub struct RTCCR_SPEC;
257impl crate::RegisterSpec for RTCCR_SPEC {
258    type Ux = u32;
259}
260///`read()` method returns [rtccr::R](R) reader structure
261impl crate::Readable for RTCCR_SPEC {
262    type Reader = R;
263}
264///`write(|w| ..)` method takes [rtccr::W](W) writer structure
265impl crate::Writable for RTCCR_SPEC {
266    type Writer = W;
267    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
268    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
269}
270///`reset()` method sets RTCCR to value 0
271impl crate::Resettable for RTCCR_SPEC {
272    const RESET_VALUE: Self::Ux = 0;
273}
py32f0/py32f030/rtc/rtccr.rs

py32f0/py32f030/rtc/
rtccr.rs
