py32f0/py32f030/rtc/
crh.rs

1///Register `CRH` reader
2pub struct R(crate::R<CRH_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CRH_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CRH_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CRH_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `CRH` writer
17pub struct W(crate::W<CRH_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CRH_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CRH_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CRH_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `SECIE` reader - Second interrupt Enable
38pub type SECIE_R = crate::BitReader<SECIE_A>;
39/**Second interrupt Enable
40
41Value on reset: 0*/
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum SECIE_A {
44    ///0: Second interrupt is masked
45    Disabled = 0,
46    ///1: Second interrupt is enabled
47    Enabled = 1,
48}
49impl From<SECIE_A> for bool {
50    #[inline(always)]
51    fn from(variant: SECIE_A) -> Self {
52        variant as u8 != 0
53    }
54}
55impl SECIE_R {
56    ///Get enumerated values variant
57    #[inline(always)]
58    pub fn variant(&self) -> SECIE_A {
59        match self.bits {
60            false => SECIE_A::Disabled,
61            true => SECIE_A::Enabled,
62        }
63    }
64    ///Checks if the value of the field is `Disabled`
65    #[inline(always)]
66    pub fn is_disabled(&self) -> bool {
67        *self == SECIE_A::Disabled
68    }
69    ///Checks if the value of the field is `Enabled`
70    #[inline(always)]
71    pub fn is_enabled(&self) -> bool {
72        *self == SECIE_A::Enabled
73    }
74}
75///Field `SECIE` writer - Second interrupt Enable
76pub type SECIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CRH_SPEC, SECIE_A, O>;
77impl<'a, const O: u8> SECIE_W<'a, O> {
78    ///Second interrupt is masked
79    #[inline(always)]
80    pub fn disabled(self) -> &'a mut W {
81        self.variant(SECIE_A::Disabled)
82    }
83    ///Second interrupt is enabled
84    #[inline(always)]
85    pub fn enabled(self) -> &'a mut W {
86        self.variant(SECIE_A::Enabled)
87    }
88}
89///Field `ALRIE` reader - Alarm interrupt Enable
90pub type ALRIE_R = crate::BitReader<ALRIE_A>;
91/**Alarm interrupt Enable
92
93Value on reset: 0*/
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95pub enum ALRIE_A {
96    ///0: Alarm interrupt is masked
97    Disabled = 0,
98    ///1: Alarm interrupt is enabled
99    Enabled = 1,
100}
101impl From<ALRIE_A> for bool {
102    #[inline(always)]
103    fn from(variant: ALRIE_A) -> Self {
104        variant as u8 != 0
105    }
106}
107impl ALRIE_R {
108    ///Get enumerated values variant
109    #[inline(always)]
110    pub fn variant(&self) -> ALRIE_A {
111        match self.bits {
112            false => ALRIE_A::Disabled,
113            true => ALRIE_A::Enabled,
114        }
115    }
116    ///Checks if the value of the field is `Disabled`
117    #[inline(always)]
118    pub fn is_disabled(&self) -> bool {
119        *self == ALRIE_A::Disabled
120    }
121    ///Checks if the value of the field is `Enabled`
122    #[inline(always)]
123    pub fn is_enabled(&self) -> bool {
124        *self == ALRIE_A::Enabled
125    }
126}
127///Field `ALRIE` writer - Alarm interrupt Enable
128pub type ALRIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CRH_SPEC, ALRIE_A, O>;
129impl<'a, const O: u8> ALRIE_W<'a, O> {
130    ///Alarm interrupt is masked
131    #[inline(always)]
132    pub fn disabled(self) -> &'a mut W {
133        self.variant(ALRIE_A::Disabled)
134    }
135    ///Alarm interrupt is enabled
136    #[inline(always)]
137    pub fn enabled(self) -> &'a mut W {
138        self.variant(ALRIE_A::Enabled)
139    }
140}
141///Field `OWIE` reader - Overflow interrupt Enable
142pub type OWIE_R = crate::BitReader<OWIE_A>;
143/**Overflow interrupt Enable
144
145Value on reset: 0*/
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147pub enum OWIE_A {
148    ///0: Overflow interrupt is masked
149    Disabled = 0,
150    ///1: Overflow interrupt is enabled
151    Enabled = 1,
152}
153impl From<OWIE_A> for bool {
154    #[inline(always)]
155    fn from(variant: OWIE_A) -> Self {
156        variant as u8 != 0
157    }
158}
159impl OWIE_R {
160    ///Get enumerated values variant
161    #[inline(always)]
162    pub fn variant(&self) -> OWIE_A {
163        match self.bits {
164            false => OWIE_A::Disabled,
165            true => OWIE_A::Enabled,
166        }
167    }
168    ///Checks if the value of the field is `Disabled`
169    #[inline(always)]
170    pub fn is_disabled(&self) -> bool {
171        *self == OWIE_A::Disabled
172    }
173    ///Checks if the value of the field is `Enabled`
174    #[inline(always)]
175    pub fn is_enabled(&self) -> bool {
176        *self == OWIE_A::Enabled
177    }
178}
179///Field `OWIE` writer - Overflow interrupt Enable
180pub type OWIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CRH_SPEC, OWIE_A, O>;
181impl<'a, const O: u8> OWIE_W<'a, O> {
182    ///Overflow interrupt is masked
183    #[inline(always)]
184    pub fn disabled(self) -> &'a mut W {
185        self.variant(OWIE_A::Disabled)
186    }
187    ///Overflow interrupt is enabled
188    #[inline(always)]
189    pub fn enabled(self) -> &'a mut W {
190        self.variant(OWIE_A::Enabled)
191    }
192}
193impl R {
194    ///Bit 0 - Second interrupt Enable
195    #[inline(always)]
196    pub fn secie(&self) -> SECIE_R {
197        SECIE_R::new((self.bits & 1) != 0)
198    }
199    ///Bit 1 - Alarm interrupt Enable
200    #[inline(always)]
201    pub fn alrie(&self) -> ALRIE_R {
202        ALRIE_R::new(((self.bits >> 1) & 1) != 0)
203    }
204    ///Bit 2 - Overflow interrupt Enable
205    #[inline(always)]
206    pub fn owie(&self) -> OWIE_R {
207        OWIE_R::new(((self.bits >> 2) & 1) != 0)
208    }
209}
210impl W {
211    ///Bit 0 - Second interrupt Enable
212    #[inline(always)]
213    #[must_use]
214    pub fn secie(&mut self) -> SECIE_W<0> {
215        SECIE_W::new(self)
216    }
217    ///Bit 1 - Alarm interrupt Enable
218    #[inline(always)]
219    #[must_use]
220    pub fn alrie(&mut self) -> ALRIE_W<1> {
221        ALRIE_W::new(self)
222    }
223    ///Bit 2 - Overflow interrupt Enable
224    #[inline(always)]
225    #[must_use]
226    pub fn owie(&mut self) -> OWIE_W<2> {
227        OWIE_W::new(self)
228    }
229    ///Writes raw bits to the register.
230    #[inline(always)]
231    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
232        self.0.bits(bits);
233        self
234    }
235}
236/**RTC Control Register High
237
238This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
239
240For information about available fields see [crh](index.html) module*/
241pub struct CRH_SPEC;
242impl crate::RegisterSpec for CRH_SPEC {
243    type Ux = u32;
244}
245///`read()` method returns [crh::R](R) reader structure
246impl crate::Readable for CRH_SPEC {
247    type Reader = R;
248}
249///`write(|w| ..)` method takes [crh::W](W) writer structure
250impl crate::Writable for CRH_SPEC {
251    type Writer = W;
252    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
253    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
254}
255///`reset()` method sets CRH to value 0
256impl crate::Resettable for CRH_SPEC {
257    const RESET_VALUE: Self::Ux = 0;
258}
py32f0/py32f030/rtc/crh.rs

py32f0/py32f030/rtc/
crh.rs
