py32f0/py32f003/rcc/
ahbrstr.rs

1///Register `AHBRSTR` reader
2pub struct R(crate::R<AHBRSTR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<AHBRSTR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<AHBRSTR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<AHBRSTR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `AHBRSTR` writer
17pub struct W(crate::W<AHBRSTR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<AHBRSTR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<AHBRSTR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<AHBRSTR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `DMARST` reader - DMA reset
38pub type DMARST_R = crate::BitReader<DMARSTW_A>;
39/**DMA reset
40
41Value on reset: 0*/
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum DMARSTW_A {
44    ///1: Reset the module
45    Reset = 1,
46}
47impl From<DMARSTW_A> for bool {
48    #[inline(always)]
49    fn from(variant: DMARSTW_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl DMARST_R {
54    ///Get enumerated values variant
55    #[inline(always)]
56    pub fn variant(&self) -> Option<DMARSTW_A> {
57        match self.bits {
58            true => Some(DMARSTW_A::Reset),
59            _ => None,
60        }
61    }
62    ///Checks if the value of the field is `Reset`
63    #[inline(always)]
64    pub fn is_reset(&self) -> bool {
65        *self == DMARSTW_A::Reset
66    }
67}
68///Field `DMARST` writer - DMA reset
69pub type DMARST_W<'a, const O: u8> = crate::BitWriter<'a, u32, AHBRSTR_SPEC, DMARSTW_A, O>;
70impl<'a, const O: u8> DMARST_W<'a, O> {
71    ///Reset the module
72    #[inline(always)]
73    pub fn reset(self) -> &'a mut W {
74        self.variant(DMARSTW_A::Reset)
75    }
76}
77///Field `CRCRST` reader - CRC reset
78pub use DMARST_R as CRCRST_R;
79///Field `CRCRST` writer - CRC reset
80pub use DMARST_W as CRCRST_W;
81impl R {
82    ///Bit 0 - DMA reset
83    #[inline(always)]
84    pub fn dmarst(&self) -> DMARST_R {
85        DMARST_R::new((self.bits & 1) != 0)
86    }
87    ///Bit 12 - CRC reset
88    #[inline(always)]
89    pub fn crcrst(&self) -> CRCRST_R {
90        CRCRST_R::new(((self.bits >> 12) & 1) != 0)
91    }
92}
93impl W {
94    ///Bit 0 - DMA reset
95    #[inline(always)]
96    #[must_use]
97    pub fn dmarst(&mut self) -> DMARST_W<0> {
98        DMARST_W::new(self)
99    }
100    ///Bit 12 - CRC reset
101    #[inline(always)]
102    #[must_use]
103    pub fn crcrst(&mut self) -> CRCRST_W<12> {
104        CRCRST_W::new(self)
105    }
106    ///Writes raw bits to the register.
107    #[inline(always)]
108    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
109        self.0.bits(bits);
110        self
111    }
112}
113/**AHB peripheral reset register
114
115This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
116
117For information about available fields see [ahbrstr](index.html) module*/
118pub struct AHBRSTR_SPEC;
119impl crate::RegisterSpec for AHBRSTR_SPEC {
120    type Ux = u32;
121}
122///`read()` method returns [ahbrstr::R](R) reader structure
123impl crate::Readable for AHBRSTR_SPEC {
124    type Reader = R;
125}
126///`write(|w| ..)` method takes [ahbrstr::W](W) writer structure
127impl crate::Writable for AHBRSTR_SPEC {
128    type Writer = W;
129    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
130    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
131}
132///`reset()` method sets AHBRSTR to value 0
133impl crate::Resettable for AHBRSTR_SPEC {
134    const RESET_VALUE: Self::Ux = 0;
135}
py32f0/py32f003/rcc/ahbrstr.rs

py32f0/py32f003/rcc/
ahbrstr.rs
