py32f0/py32f002b/spi1/
sr.rs1pub struct R(crate::R<SR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16pub struct W(crate::W<SR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37pub type RXNE_R = crate::BitReader<RXNE_A>;
39#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum RXNE_A {
44 Empty = 0,
46 NotEmpty = 1,
48}
49impl From<RXNE_A> for bool {
50 #[inline(always)]
51 fn from(variant: RXNE_A) -> Self {
52 variant as u8 != 0
53 }
54}
55impl RXNE_R {
56 #[inline(always)]
58 pub fn variant(&self) -> RXNE_A {
59 match self.bits {
60 false => RXNE_A::Empty,
61 true => RXNE_A::NotEmpty,
62 }
63 }
64 #[inline(always)]
66 pub fn is_empty(&self) -> bool {
67 *self == RXNE_A::Empty
68 }
69 #[inline(always)]
71 pub fn is_not_empty(&self) -> bool {
72 *self == RXNE_A::NotEmpty
73 }
74}
75pub type TXE_R = crate::BitReader<TXE_A>;
77#[derive(Clone, Copy, Debug, PartialEq, Eq)]
81pub enum TXE_A {
82 NotEmpty = 0,
84 Empty = 1,
86}
87impl From<TXE_A> for bool {
88 #[inline(always)]
89 fn from(variant: TXE_A) -> Self {
90 variant as u8 != 0
91 }
92}
93impl TXE_R {
94 #[inline(always)]
96 pub fn variant(&self) -> TXE_A {
97 match self.bits {
98 false => TXE_A::NotEmpty,
99 true => TXE_A::Empty,
100 }
101 }
102 #[inline(always)]
104 pub fn is_not_empty(&self) -> bool {
105 *self == TXE_A::NotEmpty
106 }
107 #[inline(always)]
109 pub fn is_empty(&self) -> bool {
110 *self == TXE_A::Empty
111 }
112}
113pub type MODF_R = crate::BitReader<MODFR_A>;
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum MODFR_A {
120 NoFault = 0,
122 Fault = 1,
124}
125impl From<MODFR_A> for bool {
126 #[inline(always)]
127 fn from(variant: MODFR_A) -> Self {
128 variant as u8 != 0
129 }
130}
131impl MODF_R {
132 #[inline(always)]
134 pub fn variant(&self) -> MODFR_A {
135 match self.bits {
136 false => MODFR_A::NoFault,
137 true => MODFR_A::Fault,
138 }
139 }
140 #[inline(always)]
142 pub fn is_no_fault(&self) -> bool {
143 *self == MODFR_A::NoFault
144 }
145 #[inline(always)]
147 pub fn is_fault(&self) -> bool {
148 *self == MODFR_A::Fault
149 }
150}
151pub type OVR_R = crate::BitReader<OVRR_A>;
153#[derive(Clone, Copy, Debug, PartialEq, Eq)]
157pub enum OVRR_A {
158 NoOverrun = 0,
160 Overrun = 1,
162}
163impl From<OVRR_A> for bool {
164 #[inline(always)]
165 fn from(variant: OVRR_A) -> Self {
166 variant as u8 != 0
167 }
168}
169impl OVR_R {
170 #[inline(always)]
172 pub fn variant(&self) -> OVRR_A {
173 match self.bits {
174 false => OVRR_A::NoOverrun,
175 true => OVRR_A::Overrun,
176 }
177 }
178 #[inline(always)]
180 pub fn is_no_overrun(&self) -> bool {
181 *self == OVRR_A::NoOverrun
182 }
183 #[inline(always)]
185 pub fn is_overrun(&self) -> bool {
186 *self == OVRR_A::Overrun
187 }
188}
189pub type BSY_R = crate::BitReader<BSYR_A>;
191#[derive(Clone, Copy, Debug, PartialEq, Eq)]
195pub enum BSYR_A {
196 NotBusy = 0,
198 Busy = 1,
200}
201impl From<BSYR_A> for bool {
202 #[inline(always)]
203 fn from(variant: BSYR_A) -> Self {
204 variant as u8 != 0
205 }
206}
207impl BSY_R {
208 #[inline(always)]
210 pub fn variant(&self) -> BSYR_A {
211 match self.bits {
212 false => BSYR_A::NotBusy,
213 true => BSYR_A::Busy,
214 }
215 }
216 #[inline(always)]
218 pub fn is_not_busy(&self) -> bool {
219 *self == BSYR_A::NotBusy
220 }
221 #[inline(always)]
223 pub fn is_busy(&self) -> bool {
224 *self == BSYR_A::Busy
225 }
226}
227pub type FRLVL_R = crate::FieldReader<u8, FRLVLR_A>;
229#[derive(Clone, Copy, Debug, PartialEq, Eq)]
233#[repr(u8)]
234pub enum FRLVLR_A {
235 Empty = 0,
237 Quarter = 1,
239 Half = 2,
241 Full = 3,
243}
244impl From<FRLVLR_A> for u8 {
245 #[inline(always)]
246 fn from(variant: FRLVLR_A) -> Self {
247 variant as _
248 }
249}
250impl FRLVL_R {
251 #[inline(always)]
253 pub fn variant(&self) -> FRLVLR_A {
254 match self.bits {
255 0 => FRLVLR_A::Empty,
256 1 => FRLVLR_A::Quarter,
257 2 => FRLVLR_A::Half,
258 3 => FRLVLR_A::Full,
259 _ => unreachable!(),
260 }
261 }
262 #[inline(always)]
264 pub fn is_empty(&self) -> bool {
265 *self == FRLVLR_A::Empty
266 }
267 #[inline(always)]
269 pub fn is_quarter(&self) -> bool {
270 *self == FRLVLR_A::Quarter
271 }
272 #[inline(always)]
274 pub fn is_half(&self) -> bool {
275 *self == FRLVLR_A::Half
276 }
277 #[inline(always)]
279 pub fn is_full(&self) -> bool {
280 *self == FRLVLR_A::Full
281 }
282}
283pub type FTLVL_R = crate::FieldReader<u8, FTLVLR_A>;
285#[derive(Clone, Copy, Debug, PartialEq, Eq)]
289#[repr(u8)]
290pub enum FTLVLR_A {
291 Empty = 0,
293 Quarter = 1,
295 Half = 2,
297 Full = 3,
299}
300impl From<FTLVLR_A> for u8 {
301 #[inline(always)]
302 fn from(variant: FTLVLR_A) -> Self {
303 variant as _
304 }
305}
306impl FTLVL_R {
307 #[inline(always)]
309 pub fn variant(&self) -> FTLVLR_A {
310 match self.bits {
311 0 => FTLVLR_A::Empty,
312 1 => FTLVLR_A::Quarter,
313 2 => FTLVLR_A::Half,
314 3 => FTLVLR_A::Full,
315 _ => unreachable!(),
316 }
317 }
318 #[inline(always)]
320 pub fn is_empty(&self) -> bool {
321 *self == FTLVLR_A::Empty
322 }
323 #[inline(always)]
325 pub fn is_quarter(&self) -> bool {
326 *self == FTLVLR_A::Quarter
327 }
328 #[inline(always)]
330 pub fn is_half(&self) -> bool {
331 *self == FTLVLR_A::Half
332 }
333 #[inline(always)]
335 pub fn is_full(&self) -> bool {
336 *self == FTLVLR_A::Full
337 }
338}
339impl R {
340 #[inline(always)]
342 pub fn rxne(&self) -> RXNE_R {
343 RXNE_R::new((self.bits & 1) != 0)
344 }
345 #[inline(always)]
347 pub fn txe(&self) -> TXE_R {
348 TXE_R::new(((self.bits >> 1) & 1) != 0)
349 }
350 #[inline(always)]
352 pub fn modf(&self) -> MODF_R {
353 MODF_R::new(((self.bits >> 5) & 1) != 0)
354 }
355 #[inline(always)]
357 pub fn ovr(&self) -> OVR_R {
358 OVR_R::new(((self.bits >> 6) & 1) != 0)
359 }
360 #[inline(always)]
362 pub fn bsy(&self) -> BSY_R {
363 BSY_R::new(((self.bits >> 7) & 1) != 0)
364 }
365 #[inline(always)]
367 pub fn frlvl(&self) -> FRLVL_R {
368 FRLVL_R::new(((self.bits >> 9) & 3) as u8)
369 }
370 #[inline(always)]
372 pub fn ftlvl(&self) -> FTLVL_R {
373 FTLVL_R::new(((self.bits >> 11) & 3) as u8)
374 }
375}
376impl W {
377 #[inline(always)]
379 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
380 self.0.bits(bits);
381 self
382 }
383}
384pub struct SR_SPEC;
390impl crate::RegisterSpec for SR_SPEC {
391 type Ux = u32;
392}
393impl crate::Readable for SR_SPEC {
395 type Reader = R;
396}
397impl crate::Writable for SR_SPEC {
399 type Writer = W;
400 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
401 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
402}
403impl crate::Resettable for SR_SPEC {
405 const RESET_VALUE: Self::Ux = 0x02;
406}