py32f0/py32f002b/exti/rtsr.rs
1///Register `RTSR` reader
2pub struct R(crate::R<RTSR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<RTSR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<RTSR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<RTSR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16///Register `RTSR` writer
17pub struct W(crate::W<RTSR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<RTSR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<RTSR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<RTSR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37///Field `RT0` reader - Rising trigger event configuration bit of Configurable Event input
38pub type RT0_R = crate::BitReader<RT0_A>;
39/**Rising trigger event configuration bit of Configurable Event input
40
41Value on reset: 0*/
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum RT0_A {
44 ///0: Rising edge trigger is disabled
45 Disabled = 0,
46 ///1: Rising edge trigger is enabled
47 Enabled = 1,
48}
49impl From<RT0_A> for bool {
50 #[inline(always)]
51 fn from(variant: RT0_A) -> Self {
52 variant as u8 != 0
53 }
54}
55impl RT0_R {
56 ///Get enumerated values variant
57 #[inline(always)]
58 pub fn variant(&self) -> RT0_A {
59 match self.bits {
60 false => RT0_A::Disabled,
61 true => RT0_A::Enabled,
62 }
63 }
64 ///Checks if the value of the field is `Disabled`
65 #[inline(always)]
66 pub fn is_disabled(&self) -> bool {
67 *self == RT0_A::Disabled
68 }
69 ///Checks if the value of the field is `Enabled`
70 #[inline(always)]
71 pub fn is_enabled(&self) -> bool {
72 *self == RT0_A::Enabled
73 }
74}
75///Field `RT0` writer - Rising trigger event configuration bit of Configurable Event input
76pub type RT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, RTSR_SPEC, RT0_A, O>;
77impl<'a, const O: u8> RT0_W<'a, O> {
78 ///Rising edge trigger is disabled
79 #[inline(always)]
80 pub fn disabled(self) -> &'a mut W {
81 self.variant(RT0_A::Disabled)
82 }
83 ///Rising edge trigger is enabled
84 #[inline(always)]
85 pub fn enabled(self) -> &'a mut W {
86 self.variant(RT0_A::Enabled)
87 }
88}
89///Field `RT1` reader - Rising trigger event configuration bit of Configurable Event input
90pub use RT0_R as RT1_R;
91///Field `RT2` reader - Rising trigger event configuration bit of Configurable Event input
92pub use RT0_R as RT2_R;
93///Field `RT3` reader - Rising trigger event configuration bit of Configurable Event input
94pub use RT0_R as RT3_R;
95///Field `RT4` reader - Rising trigger event configuration bit of Configurable Event input
96pub use RT0_R as RT4_R;
97///Field `RT5` reader - Rising trigger event configuration bit of Configurable Event input
98pub use RT0_R as RT5_R;
99///Field `RT6` reader - Rising trigger event configuration bit of Configurable Event input
100pub use RT0_R as RT6_R;
101///Field `RT7` reader - Rising trigger event configuration bit of Configurable Event input
102pub use RT0_R as RT7_R;
103///Field `RT17` reader - Rising trigger event configuration bit of Configurable Event input
104pub use RT0_R as RT17_R;
105///Field `RT18` reader - Rising trigger event configuration bit of Configurable Event input
106pub use RT0_R as RT18_R;
107///Field `RT1` writer - Rising trigger event configuration bit of Configurable Event input
108pub use RT0_W as RT1_W;
109///Field `RT2` writer - Rising trigger event configuration bit of Configurable Event input
110pub use RT0_W as RT2_W;
111///Field `RT3` writer - Rising trigger event configuration bit of Configurable Event input
112pub use RT0_W as RT3_W;
113///Field `RT4` writer - Rising trigger event configuration bit of Configurable Event input
114pub use RT0_W as RT4_W;
115///Field `RT5` writer - Rising trigger event configuration bit of Configurable Event input
116pub use RT0_W as RT5_W;
117///Field `RT6` writer - Rising trigger event configuration bit of Configurable Event input
118pub use RT0_W as RT6_W;
119///Field `RT7` writer - Rising trigger event configuration bit of Configurable Event input
120pub use RT0_W as RT7_W;
121///Field `RT17` writer - Rising trigger event configuration bit of Configurable Event input
122pub use RT0_W as RT17_W;
123///Field `RT18` writer - Rising trigger event configuration bit of Configurable Event input
124pub use RT0_W as RT18_W;
125impl R {
126 ///Bit 0 - Rising trigger event configuration bit of Configurable Event input
127 #[inline(always)]
128 pub fn rt0(&self) -> RT0_R {
129 RT0_R::new((self.bits & 1) != 0)
130 }
131 ///Bit 1 - Rising trigger event configuration bit of Configurable Event input
132 #[inline(always)]
133 pub fn rt1(&self) -> RT1_R {
134 RT1_R::new(((self.bits >> 1) & 1) != 0)
135 }
136 ///Bit 2 - Rising trigger event configuration bit of Configurable Event input
137 #[inline(always)]
138 pub fn rt2(&self) -> RT2_R {
139 RT2_R::new(((self.bits >> 2) & 1) != 0)
140 }
141 ///Bit 3 - Rising trigger event configuration bit of Configurable Event input
142 #[inline(always)]
143 pub fn rt3(&self) -> RT3_R {
144 RT3_R::new(((self.bits >> 3) & 1) != 0)
145 }
146 ///Bit 4 - Rising trigger event configuration bit of Configurable Event input
147 #[inline(always)]
148 pub fn rt4(&self) -> RT4_R {
149 RT4_R::new(((self.bits >> 4) & 1) != 0)
150 }
151 ///Bit 5 - Rising trigger event configuration bit of Configurable Event input
152 #[inline(always)]
153 pub fn rt5(&self) -> RT5_R {
154 RT5_R::new(((self.bits >> 5) & 1) != 0)
155 }
156 ///Bit 6 - Rising trigger event configuration bit of Configurable Event input
157 #[inline(always)]
158 pub fn rt6(&self) -> RT6_R {
159 RT6_R::new(((self.bits >> 6) & 1) != 0)
160 }
161 ///Bit 7 - Rising trigger event configuration bit of Configurable Event input
162 #[inline(always)]
163 pub fn rt7(&self) -> RT7_R {
164 RT7_R::new(((self.bits >> 7) & 1) != 0)
165 }
166 ///Bit 17 - Rising trigger event configuration bit of Configurable Event input
167 #[inline(always)]
168 pub fn rt17(&self) -> RT17_R {
169 RT17_R::new(((self.bits >> 17) & 1) != 0)
170 }
171 ///Bit 18 - Rising trigger event configuration bit of Configurable Event input
172 #[inline(always)]
173 pub fn rt18(&self) -> RT18_R {
174 RT18_R::new(((self.bits >> 18) & 1) != 0)
175 }
176}
177impl W {
178 ///Bit 0 - Rising trigger event configuration bit of Configurable Event input
179 #[inline(always)]
180 #[must_use]
181 pub fn rt0(&mut self) -> RT0_W<0> {
182 RT0_W::new(self)
183 }
184 ///Bit 1 - Rising trigger event configuration bit of Configurable Event input
185 #[inline(always)]
186 #[must_use]
187 pub fn rt1(&mut self) -> RT1_W<1> {
188 RT1_W::new(self)
189 }
190 ///Bit 2 - Rising trigger event configuration bit of Configurable Event input
191 #[inline(always)]
192 #[must_use]
193 pub fn rt2(&mut self) -> RT2_W<2> {
194 RT2_W::new(self)
195 }
196 ///Bit 3 - Rising trigger event configuration bit of Configurable Event input
197 #[inline(always)]
198 #[must_use]
199 pub fn rt3(&mut self) -> RT3_W<3> {
200 RT3_W::new(self)
201 }
202 ///Bit 4 - Rising trigger event configuration bit of Configurable Event input
203 #[inline(always)]
204 #[must_use]
205 pub fn rt4(&mut self) -> RT4_W<4> {
206 RT4_W::new(self)
207 }
208 ///Bit 5 - Rising trigger event configuration bit of Configurable Event input
209 #[inline(always)]
210 #[must_use]
211 pub fn rt5(&mut self) -> RT5_W<5> {
212 RT5_W::new(self)
213 }
214 ///Bit 6 - Rising trigger event configuration bit of Configurable Event input
215 #[inline(always)]
216 #[must_use]
217 pub fn rt6(&mut self) -> RT6_W<6> {
218 RT6_W::new(self)
219 }
220 ///Bit 7 - Rising trigger event configuration bit of Configurable Event input
221 #[inline(always)]
222 #[must_use]
223 pub fn rt7(&mut self) -> RT7_W<7> {
224 RT7_W::new(self)
225 }
226 ///Bit 17 - Rising trigger event configuration bit of Configurable Event input
227 #[inline(always)]
228 #[must_use]
229 pub fn rt17(&mut self) -> RT17_W<17> {
230 RT17_W::new(self)
231 }
232 ///Bit 18 - Rising trigger event configuration bit of Configurable Event input
233 #[inline(always)]
234 #[must_use]
235 pub fn rt18(&mut self) -> RT18_W<18> {
236 RT18_W::new(self)
237 }
238 ///Writes raw bits to the register.
239 #[inline(always)]
240 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
241 self.0.bits(bits);
242 self
243 }
244}
245/**EXTI rising trigger selection register
246
247This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
248
249For information about available fields see [rtsr](index.html) module*/
250pub struct RTSR_SPEC;
251impl crate::RegisterSpec for RTSR_SPEC {
252 type Ux = u32;
253}
254///`read()` method returns [rtsr::R](R) reader structure
255impl crate::Readable for RTSR_SPEC {
256 type Reader = R;
257}
258///`write(|w| ..)` method takes [rtsr::W](W) writer structure
259impl crate::Writable for RTSR_SPEC {
260 type Writer = W;
261 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
262 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
263}
264///`reset()` method sets RTSR to value 0
265impl crate::Resettable for RTSR_SPEC {
266 const RESET_VALUE: Self::Ux = 0;
267}