1pub struct R(crate::R<CR3_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CR3_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CR3_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CR3_SPEC>) -> Self {
13 R(reader)
14 }
15}
16pub struct W(crate::W<CR3_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CR3_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CR3_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CR3_SPEC>) -> Self {
34 W(writer)
35 }
36}
37pub type EIE_R = crate::BitReader<EIE_A>;
39#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum EIE_A {
44 Disabled = 0,
46 Enabled = 1,
48}
49impl From<EIE_A> for bool {
50 #[inline(always)]
51 fn from(variant: EIE_A) -> Self {
52 variant as u8 != 0
53 }
54}
55impl EIE_R {
56 #[inline(always)]
58 pub fn variant(&self) -> EIE_A {
59 match self.bits {
60 false => EIE_A::Disabled,
61 true => EIE_A::Enabled,
62 }
63 }
64 #[inline(always)]
66 pub fn is_disabled(&self) -> bool {
67 *self == EIE_A::Disabled
68 }
69 #[inline(always)]
71 pub fn is_enabled(&self) -> bool {
72 *self == EIE_A::Enabled
73 }
74}
75pub type EIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, EIE_A, O>;
77impl<'a, const O: u8> EIE_W<'a, O> {
78 #[inline(always)]
80 pub fn disabled(self) -> &'a mut W {
81 self.variant(EIE_A::Disabled)
82 }
83 #[inline(always)]
85 pub fn enabled(self) -> &'a mut W {
86 self.variant(EIE_A::Enabled)
87 }
88}
89pub type IREN_R = crate::BitReader<IREN_A>;
91#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95pub enum IREN_A {
96 Disabled = 0,
98 Enabled = 1,
100}
101impl From<IREN_A> for bool {
102 #[inline(always)]
103 fn from(variant: IREN_A) -> Self {
104 variant as u8 != 0
105 }
106}
107impl IREN_R {
108 #[inline(always)]
110 pub fn variant(&self) -> IREN_A {
111 match self.bits {
112 false => IREN_A::Disabled,
113 true => IREN_A::Enabled,
114 }
115 }
116 #[inline(always)]
118 pub fn is_disabled(&self) -> bool {
119 *self == IREN_A::Disabled
120 }
121 #[inline(always)]
123 pub fn is_enabled(&self) -> bool {
124 *self == IREN_A::Enabled
125 }
126}
127pub type IREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, IREN_A, O>;
129impl<'a, const O: u8> IREN_W<'a, O> {
130 #[inline(always)]
132 pub fn disabled(self) -> &'a mut W {
133 self.variant(IREN_A::Disabled)
134 }
135 #[inline(always)]
137 pub fn enabled(self) -> &'a mut W {
138 self.variant(IREN_A::Enabled)
139 }
140}
141pub type IRLP_R = crate::BitReader<IRLP_A>;
143#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147pub enum IRLP_A {
148 Normal = 0,
150 LowPower = 1,
152}
153impl From<IRLP_A> for bool {
154 #[inline(always)]
155 fn from(variant: IRLP_A) -> Self {
156 variant as u8 != 0
157 }
158}
159impl IRLP_R {
160 #[inline(always)]
162 pub fn variant(&self) -> IRLP_A {
163 match self.bits {
164 false => IRLP_A::Normal,
165 true => IRLP_A::LowPower,
166 }
167 }
168 #[inline(always)]
170 pub fn is_normal(&self) -> bool {
171 *self == IRLP_A::Normal
172 }
173 #[inline(always)]
175 pub fn is_low_power(&self) -> bool {
176 *self == IRLP_A::LowPower
177 }
178}
179pub type IRLP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, IRLP_A, O>;
181impl<'a, const O: u8> IRLP_W<'a, O> {
182 #[inline(always)]
184 pub fn normal(self) -> &'a mut W {
185 self.variant(IRLP_A::Normal)
186 }
187 #[inline(always)]
189 pub fn low_power(self) -> &'a mut W {
190 self.variant(IRLP_A::LowPower)
191 }
192}
193pub type HDSEL_R = crate::BitReader<HDSEL_A>;
195#[derive(Clone, Copy, Debug, PartialEq, Eq)]
199pub enum HDSEL_A {
200 FullDuplex = 0,
202 HalfDuplex = 1,
204}
205impl From<HDSEL_A> for bool {
206 #[inline(always)]
207 fn from(variant: HDSEL_A) -> Self {
208 variant as u8 != 0
209 }
210}
211impl HDSEL_R {
212 #[inline(always)]
214 pub fn variant(&self) -> HDSEL_A {
215 match self.bits {
216 false => HDSEL_A::FullDuplex,
217 true => HDSEL_A::HalfDuplex,
218 }
219 }
220 #[inline(always)]
222 pub fn is_full_duplex(&self) -> bool {
223 *self == HDSEL_A::FullDuplex
224 }
225 #[inline(always)]
227 pub fn is_half_duplex(&self) -> bool {
228 *self == HDSEL_A::HalfDuplex
229 }
230}
231pub type HDSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, HDSEL_A, O>;
233impl<'a, const O: u8> HDSEL_W<'a, O> {
234 #[inline(always)]
236 pub fn full_duplex(self) -> &'a mut W {
237 self.variant(HDSEL_A::FullDuplex)
238 }
239 #[inline(always)]
241 pub fn half_duplex(self) -> &'a mut W {
242 self.variant(HDSEL_A::HalfDuplex)
243 }
244}
245pub type RTSE_R = crate::BitReader<RTSE_A>;
247#[derive(Clone, Copy, Debug, PartialEq, Eq)]
251pub enum RTSE_A {
252 Disabled = 0,
254 Enabled = 1,
256}
257impl From<RTSE_A> for bool {
258 #[inline(always)]
259 fn from(variant: RTSE_A) -> Self {
260 variant as u8 != 0
261 }
262}
263impl RTSE_R {
264 #[inline(always)]
266 pub fn variant(&self) -> RTSE_A {
267 match self.bits {
268 false => RTSE_A::Disabled,
269 true => RTSE_A::Enabled,
270 }
271 }
272 #[inline(always)]
274 pub fn is_disabled(&self) -> bool {
275 *self == RTSE_A::Disabled
276 }
277 #[inline(always)]
279 pub fn is_enabled(&self) -> bool {
280 *self == RTSE_A::Enabled
281 }
282}
283pub type RTSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, RTSE_A, O>;
285impl<'a, const O: u8> RTSE_W<'a, O> {
286 #[inline(always)]
288 pub fn disabled(self) -> &'a mut W {
289 self.variant(RTSE_A::Disabled)
290 }
291 #[inline(always)]
293 pub fn enabled(self) -> &'a mut W {
294 self.variant(RTSE_A::Enabled)
295 }
296}
297pub type CTSE_R = crate::BitReader<CTSE_A>;
299#[derive(Clone, Copy, Debug, PartialEq, Eq)]
303pub enum CTSE_A {
304 Disabled = 0,
306 Enabled = 1,
308}
309impl From<CTSE_A> for bool {
310 #[inline(always)]
311 fn from(variant: CTSE_A) -> Self {
312 variant as u8 != 0
313 }
314}
315impl CTSE_R {
316 #[inline(always)]
318 pub fn variant(&self) -> CTSE_A {
319 match self.bits {
320 false => CTSE_A::Disabled,
321 true => CTSE_A::Enabled,
322 }
323 }
324 #[inline(always)]
326 pub fn is_disabled(&self) -> bool {
327 *self == CTSE_A::Disabled
328 }
329 #[inline(always)]
331 pub fn is_enabled(&self) -> bool {
332 *self == CTSE_A::Enabled
333 }
334}
335pub type CTSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, CTSE_A, O>;
337impl<'a, const O: u8> CTSE_W<'a, O> {
338 #[inline(always)]
340 pub fn disabled(self) -> &'a mut W {
341 self.variant(CTSE_A::Disabled)
342 }
343 #[inline(always)]
345 pub fn enabled(self) -> &'a mut W {
346 self.variant(CTSE_A::Enabled)
347 }
348}
349pub type CTSIE_R = crate::BitReader<CTSIE_A>;
351#[derive(Clone, Copy, Debug, PartialEq, Eq)]
355pub enum CTSIE_A {
356 Disabled = 0,
358 Enabled = 1,
360}
361impl From<CTSIE_A> for bool {
362 #[inline(always)]
363 fn from(variant: CTSIE_A) -> Self {
364 variant as u8 != 0
365 }
366}
367impl CTSIE_R {
368 #[inline(always)]
370 pub fn variant(&self) -> CTSIE_A {
371 match self.bits {
372 false => CTSIE_A::Disabled,
373 true => CTSIE_A::Enabled,
374 }
375 }
376 #[inline(always)]
378 pub fn is_disabled(&self) -> bool {
379 *self == CTSIE_A::Disabled
380 }
381 #[inline(always)]
383 pub fn is_enabled(&self) -> bool {
384 *self == CTSIE_A::Enabled
385 }
386}
387pub type CTSIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, CTSIE_A, O>;
389impl<'a, const O: u8> CTSIE_W<'a, O> {
390 #[inline(always)]
392 pub fn disabled(self) -> &'a mut W {
393 self.variant(CTSIE_A::Disabled)
394 }
395 #[inline(always)]
397 pub fn enabled(self) -> &'a mut W {
398 self.variant(CTSIE_A::Enabled)
399 }
400}
401pub type OVER8_R = crate::BitReader<OVER8_A>;
403#[derive(Clone, Copy, Debug, PartialEq, Eq)]
407pub enum OVER8_A {
408 Oversampling16 = 0,
410 Oversampling8 = 1,
412}
413impl From<OVER8_A> for bool {
414 #[inline(always)]
415 fn from(variant: OVER8_A) -> Self {
416 variant as u8 != 0
417 }
418}
419impl OVER8_R {
420 #[inline(always)]
422 pub fn variant(&self) -> OVER8_A {
423 match self.bits {
424 false => OVER8_A::Oversampling16,
425 true => OVER8_A::Oversampling8,
426 }
427 }
428 #[inline(always)]
430 pub fn is_oversampling16(&self) -> bool {
431 *self == OVER8_A::Oversampling16
432 }
433 #[inline(always)]
435 pub fn is_oversampling8(&self) -> bool {
436 *self == OVER8_A::Oversampling8
437 }
438}
439pub type OVER8_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, OVER8_A, O>;
441impl<'a, const O: u8> OVER8_W<'a, O> {
442 #[inline(always)]
444 pub fn oversampling16(self) -> &'a mut W {
445 self.variant(OVER8_A::Oversampling16)
446 }
447 #[inline(always)]
449 pub fn oversampling8(self) -> &'a mut W {
450 self.variant(OVER8_A::Oversampling8)
451 }
452}
453pub type ABREN_R = crate::BitReader<ABREN_A>;
455#[derive(Clone, Copy, Debug, PartialEq, Eq)]
459pub enum ABREN_A {
460 Disabled = 0,
462 Enabled = 1,
464}
465impl From<ABREN_A> for bool {
466 #[inline(always)]
467 fn from(variant: ABREN_A) -> Self {
468 variant as u8 != 0
469 }
470}
471impl ABREN_R {
472 #[inline(always)]
474 pub fn variant(&self) -> ABREN_A {
475 match self.bits {
476 false => ABREN_A::Disabled,
477 true => ABREN_A::Enabled,
478 }
479 }
480 #[inline(always)]
482 pub fn is_disabled(&self) -> bool {
483 *self == ABREN_A::Disabled
484 }
485 #[inline(always)]
487 pub fn is_enabled(&self) -> bool {
488 *self == ABREN_A::Enabled
489 }
490}
491pub type ABREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR3_SPEC, ABREN_A, O>;
493impl<'a, const O: u8> ABREN_W<'a, O> {
494 #[inline(always)]
496 pub fn disabled(self) -> &'a mut W {
497 self.variant(ABREN_A::Disabled)
498 }
499 #[inline(always)]
501 pub fn enabled(self) -> &'a mut W {
502 self.variant(ABREN_A::Enabled)
503 }
504}
505pub type ABRMOD_R = crate::FieldReader<u8, ABRMOD_A>;
507#[derive(Clone, Copy, Debug, PartialEq, Eq)]
511#[repr(u8)]
512pub enum ABRMOD_A {
513 Start = 0,
515 Edge = 1,
517 Reserved1 = 2,
519 Reserved2 = 3,
521}
522impl From<ABRMOD_A> for u8 {
523 #[inline(always)]
524 fn from(variant: ABRMOD_A) -> Self {
525 variant as _
526 }
527}
528impl ABRMOD_R {
529 #[inline(always)]
531 pub fn variant(&self) -> ABRMOD_A {
532 match self.bits {
533 0 => ABRMOD_A::Start,
534 1 => ABRMOD_A::Edge,
535 2 => ABRMOD_A::Reserved1,
536 3 => ABRMOD_A::Reserved2,
537 _ => unreachable!(),
538 }
539 }
540 #[inline(always)]
542 pub fn is_start(&self) -> bool {
543 *self == ABRMOD_A::Start
544 }
545 #[inline(always)]
547 pub fn is_edge(&self) -> bool {
548 *self == ABRMOD_A::Edge
549 }
550 #[inline(always)]
552 pub fn is_reserved1(&self) -> bool {
553 *self == ABRMOD_A::Reserved1
554 }
555 #[inline(always)]
557 pub fn is_reserved2(&self) -> bool {
558 *self == ABRMOD_A::Reserved2
559 }
560}
561pub type ABRMOD_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CR3_SPEC, u8, ABRMOD_A, 2, O>;
563impl<'a, const O: u8> ABRMOD_W<'a, O> {
564 #[inline(always)]
566 pub fn start(self) -> &'a mut W {
567 self.variant(ABRMOD_A::Start)
568 }
569 #[inline(always)]
571 pub fn edge(self) -> &'a mut W {
572 self.variant(ABRMOD_A::Edge)
573 }
574 #[inline(always)]
576 pub fn reserved1(self) -> &'a mut W {
577 self.variant(ABRMOD_A::Reserved1)
578 }
579 #[inline(always)]
581 pub fn reserved2(self) -> &'a mut W {
582 self.variant(ABRMOD_A::Reserved2)
583 }
584}
585impl R {
586 #[inline(always)]
588 pub fn eie(&self) -> EIE_R {
589 EIE_R::new((self.bits & 1) != 0)
590 }
591 #[inline(always)]
593 pub fn iren(&self) -> IREN_R {
594 IREN_R::new(((self.bits >> 1) & 1) != 0)
595 }
596 #[inline(always)]
598 pub fn irlp(&self) -> IRLP_R {
599 IRLP_R::new(((self.bits >> 2) & 1) != 0)
600 }
601 #[inline(always)]
603 pub fn hdsel(&self) -> HDSEL_R {
604 HDSEL_R::new(((self.bits >> 3) & 1) != 0)
605 }
606 #[inline(always)]
608 pub fn rtse(&self) -> RTSE_R {
609 RTSE_R::new(((self.bits >> 8) & 1) != 0)
610 }
611 #[inline(always)]
613 pub fn ctse(&self) -> CTSE_R {
614 CTSE_R::new(((self.bits >> 9) & 1) != 0)
615 }
616 #[inline(always)]
618 pub fn ctsie(&self) -> CTSIE_R {
619 CTSIE_R::new(((self.bits >> 10) & 1) != 0)
620 }
621 #[inline(always)]
623 pub fn over8(&self) -> OVER8_R {
624 OVER8_R::new(((self.bits >> 11) & 1) != 0)
625 }
626 #[inline(always)]
628 pub fn abren(&self) -> ABREN_R {
629 ABREN_R::new(((self.bits >> 12) & 1) != 0)
630 }
631 #[inline(always)]
633 pub fn abrmod(&self) -> ABRMOD_R {
634 ABRMOD_R::new(((self.bits >> 13) & 3) as u8)
635 }
636}
637impl W {
638 #[inline(always)]
640 #[must_use]
641 pub fn eie(&mut self) -> EIE_W<0> {
642 EIE_W::new(self)
643 }
644 #[inline(always)]
646 #[must_use]
647 pub fn iren(&mut self) -> IREN_W<1> {
648 IREN_W::new(self)
649 }
650 #[inline(always)]
652 #[must_use]
653 pub fn irlp(&mut self) -> IRLP_W<2> {
654 IRLP_W::new(self)
655 }
656 #[inline(always)]
658 #[must_use]
659 pub fn hdsel(&mut self) -> HDSEL_W<3> {
660 HDSEL_W::new(self)
661 }
662 #[inline(always)]
664 #[must_use]
665 pub fn rtse(&mut self) -> RTSE_W<8> {
666 RTSE_W::new(self)
667 }
668 #[inline(always)]
670 #[must_use]
671 pub fn ctse(&mut self) -> CTSE_W<9> {
672 CTSE_W::new(self)
673 }
674 #[inline(always)]
676 #[must_use]
677 pub fn ctsie(&mut self) -> CTSIE_W<10> {
678 CTSIE_W::new(self)
679 }
680 #[inline(always)]
682 #[must_use]
683 pub fn over8(&mut self) -> OVER8_W<11> {
684 OVER8_W::new(self)
685 }
686 #[inline(always)]
688 #[must_use]
689 pub fn abren(&mut self) -> ABREN_W<12> {
690 ABREN_W::new(self)
691 }
692 #[inline(always)]
694 #[must_use]
695 pub fn abrmod(&mut self) -> ABRMOD_W<13> {
696 ABRMOD_W::new(self)
697 }
698 #[inline(always)]
700 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
701 self.0.bits(bits);
702 self
703 }
704}
705pub struct CR3_SPEC;
711impl crate::RegisterSpec for CR3_SPEC {
712 type Ux = u32;
713}
714impl crate::Readable for CR3_SPEC {
716 type Reader = R;
717}
718impl crate::Writable for CR3_SPEC {
720 type Writer = W;
721 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
722 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
723}
724impl crate::Resettable for CR3_SPEC {
726 const RESET_VALUE: Self::Ux = 0;
727}