py32f0/py32f002a/iwdg/
kr.rs

1///Register `KR` writer
2pub struct W(crate::W<KR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<KR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<KR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<KR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22/**Key value
23
24Value on reset: 0*/
25#[derive(Clone, Copy, Debug, PartialEq, Eq)]
26#[repr(u16)]
27pub enum KEY_AW {
28    ///21845: Enable access to PR, RLR and WINR registers (0x5555)
29    Enable = 21845,
30    ///43690: Reset the watchdog value (0xAAAA)
31    Reset = 43690,
32    ///52428: Start the watchdog (0xCCCC)
33    Start = 52428,
34}
35impl From<KEY_AW> for u16 {
36    #[inline(always)]
37    fn from(variant: KEY_AW) -> Self {
38        variant as _
39    }
40}
41///Field `KEY` writer - Key value
42pub type KEY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, KR_SPEC, u16, KEY_AW, 16, O>;
43impl<'a, const O: u8> KEY_W<'a, O> {
44    ///Enable access to PR, RLR and WINR registers (0x5555)
45    #[inline(always)]
46    pub fn enable(self) -> &'a mut W {
47        self.variant(KEY_AW::Enable)
48    }
49    ///Reset the watchdog value (0xAAAA)
50    #[inline(always)]
51    pub fn reset(self) -> &'a mut W {
52        self.variant(KEY_AW::Reset)
53    }
54    ///Start the watchdog (0xCCCC)
55    #[inline(always)]
56    pub fn start(self) -> &'a mut W {
57        self.variant(KEY_AW::Start)
58    }
59}
60impl W {
61    ///Bits 0:15 - Key value
62    #[inline(always)]
63    #[must_use]
64    pub fn key(&mut self) -> KEY_W<0> {
65        KEY_W::new(self)
66    }
67    ///Writes raw bits to the register.
68    #[inline(always)]
69    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
70        self.0.bits(bits);
71        self
72    }
73}
74/**Key register (IWDG_KR)
75
76This register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
77
78For information about available fields see [kr](index.html) module*/
79pub struct KR_SPEC;
80impl crate::RegisterSpec for KR_SPEC {
81    type Ux = u32;
82}
83///`write(|w| ..)` method takes [kr::W](W) writer structure
84impl crate::Writable for KR_SPEC {
85    type Writer = W;
86    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
87    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
88}
89///`reset()` method sets KR to value 0
90impl crate::Resettable for KR_SPEC {
91    const RESET_VALUE: Self::Ux = 0;
92}
py32f0/py32f002a/iwdg/kr.rs

py32f0/py32f002a/iwdg/
kr.rs
