py32f0/py32f030/rcc/
apbrstr2.rs

1///Register `APBRSTR2` reader
2pub struct R(crate::R<APBRSTR2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<APBRSTR2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<APBRSTR2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<APBRSTR2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `APBRSTR2` writer
17pub struct W(crate::W<APBRSTR2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<APBRSTR2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<APBRSTR2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<APBRSTR2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `SYSCFGRST` reader - SYSCFG and COMP reset
38pub type SYSCFGRST_R = crate::BitReader<SYSCFGRSTW_A>;
39/**SYSCFG and COMP reset
40
41Value on reset: 0*/
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum SYSCFGRSTW_A {
44    ///1: Reset the module
45    Reset = 1,
46}
47impl From<SYSCFGRSTW_A> for bool {
48    #[inline(always)]
49    fn from(variant: SYSCFGRSTW_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl SYSCFGRST_R {
54    ///Get enumerated values variant
55    #[inline(always)]
56    pub fn variant(&self) -> Option<SYSCFGRSTW_A> {
57        match self.bits {
58            true => Some(SYSCFGRSTW_A::Reset),
59            _ => None,
60        }
61    }
62    ///Checks if the value of the field is `Reset`
63    #[inline(always)]
64    pub fn is_reset(&self) -> bool {
65        *self == SYSCFGRSTW_A::Reset
66    }
67}
68///Field `SYSCFGRST` writer - SYSCFG and COMP reset
69pub type SYSCFGRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, APBRSTR2_SPEC, SYSCFGRSTW_A, O>;
70impl<'a, const O: u8> SYSCFGRST_W<'a, O> {
71    ///Reset the module
72    #[inline(always)]
73    pub fn reset(self) -> &'a mut W {
74        self.variant(SYSCFGRSTW_A::Reset)
75    }
76}
77///Field `TIM1RST` reader - TIM1 timer reset
78pub use SYSCFGRST_R as TIM1RST_R;
79///Field `SPI1RST` reader - SPI1 reset
80pub use SYSCFGRST_R as SPI1RST_R;
81///Field `USART1RST` reader - USART1 reset
82pub use SYSCFGRST_R as USART1RST_R;
83///Field `TIM14RST` reader - TIM14 timer reset
84pub use SYSCFGRST_R as TIM14RST_R;
85///Field `TIM16RST` reader - TIM16 timer reset
86pub use SYSCFGRST_R as TIM16RST_R;
87///Field `TIM17RST` reader - TIM17 timer reset
88pub use SYSCFGRST_R as TIM17RST_R;
89///Field `ADCRST` reader - ADC reset
90pub use SYSCFGRST_R as ADCRST_R;
91///Field `COMP1RST` reader - COMP1 reset
92pub use SYSCFGRST_R as COMP1RST_R;
93///Field `COMP2RST` reader - COMP2 reset
94pub use SYSCFGRST_R as COMP2RST_R;
95///Field `LEDRST` reader - LED reset
96pub use SYSCFGRST_R as LEDRST_R;
97///Field `TIM1RST` writer - TIM1 timer reset
98pub use SYSCFGRST_W as TIM1RST_W;
99///Field `SPI1RST` writer - SPI1 reset
100pub use SYSCFGRST_W as SPI1RST_W;
101///Field `USART1RST` writer - USART1 reset
102pub use SYSCFGRST_W as USART1RST_W;
103///Field `TIM14RST` writer - TIM14 timer reset
104pub use SYSCFGRST_W as TIM14RST_W;
105///Field `TIM16RST` writer - TIM16 timer reset
106pub use SYSCFGRST_W as TIM16RST_W;
107///Field `TIM17RST` writer - TIM17 timer reset
108pub use SYSCFGRST_W as TIM17RST_W;
109///Field `ADCRST` writer - ADC reset
110pub use SYSCFGRST_W as ADCRST_W;
111///Field `COMP1RST` writer - COMP1 reset
112pub use SYSCFGRST_W as COMP1RST_W;
113///Field `COMP2RST` writer - COMP2 reset
114pub use SYSCFGRST_W as COMP2RST_W;
115///Field `LEDRST` writer - LED reset
116pub use SYSCFGRST_W as LEDRST_W;
117impl R {
118    ///Bit 0 - SYSCFG and COMP reset
119    #[inline(always)]
120    pub fn syscfgrst(&self) -> SYSCFGRST_R {
121        SYSCFGRST_R::new((self.bits & 1) != 0)
122    }
123    ///Bit 11 - TIM1 timer reset
124    #[inline(always)]
125    pub fn tim1rst(&self) -> TIM1RST_R {
126        TIM1RST_R::new(((self.bits >> 11) & 1) != 0)
127    }
128    ///Bit 12 - SPI1 reset
129    #[inline(always)]
130    pub fn spi1rst(&self) -> SPI1RST_R {
131        SPI1RST_R::new(((self.bits >> 12) & 1) != 0)
132    }
133    ///Bit 14 - USART1 reset
134    #[inline(always)]
135    pub fn usart1rst(&self) -> USART1RST_R {
136        USART1RST_R::new(((self.bits >> 14) & 1) != 0)
137    }
138    ///Bit 15 - TIM14 timer reset
139    #[inline(always)]
140    pub fn tim14rst(&self) -> TIM14RST_R {
141        TIM14RST_R::new(((self.bits >> 15) & 1) != 0)
142    }
143    ///Bit 17 - TIM16 timer reset
144    #[inline(always)]
145    pub fn tim16rst(&self) -> TIM16RST_R {
146        TIM16RST_R::new(((self.bits >> 17) & 1) != 0)
147    }
148    ///Bit 18 - TIM17 timer reset
149    #[inline(always)]
150    pub fn tim17rst(&self) -> TIM17RST_R {
151        TIM17RST_R::new(((self.bits >> 18) & 1) != 0)
152    }
153    ///Bit 20 - ADC reset
154    #[inline(always)]
155    pub fn adcrst(&self) -> ADCRST_R {
156        ADCRST_R::new(((self.bits >> 20) & 1) != 0)
157    }
158    ///Bit 21 - COMP1 reset
159    #[inline(always)]
160    pub fn comp1rst(&self) -> COMP1RST_R {
161        COMP1RST_R::new(((self.bits >> 21) & 1) != 0)
162    }
163    ///Bit 22 - COMP2 reset
164    #[inline(always)]
165    pub fn comp2rst(&self) -> COMP2RST_R {
166        COMP2RST_R::new(((self.bits >> 22) & 1) != 0)
167    }
168    ///Bit 23 - LED reset
169    #[inline(always)]
170    pub fn ledrst(&self) -> LEDRST_R {
171        LEDRST_R::new(((self.bits >> 23) & 1) != 0)
172    }
173}
174impl W {
175    ///Bit 0 - SYSCFG and COMP reset
176    #[inline(always)]
177    #[must_use]
178    pub fn syscfgrst(&mut self) -> SYSCFGRST_W<0> {
179        SYSCFGRST_W::new(self)
180    }
181    ///Bit 11 - TIM1 timer reset
182    #[inline(always)]
183    #[must_use]
184    pub fn tim1rst(&mut self) -> TIM1RST_W<11> {
185        TIM1RST_W::new(self)
186    }
187    ///Bit 12 - SPI1 reset
188    #[inline(always)]
189    #[must_use]
190    pub fn spi1rst(&mut self) -> SPI1RST_W<12> {
191        SPI1RST_W::new(self)
192    }
193    ///Bit 14 - USART1 reset
194    #[inline(always)]
195    #[must_use]
196    pub fn usart1rst(&mut self) -> USART1RST_W<14> {
197        USART1RST_W::new(self)
198    }
199    ///Bit 15 - TIM14 timer reset
200    #[inline(always)]
201    #[must_use]
202    pub fn tim14rst(&mut self) -> TIM14RST_W<15> {
203        TIM14RST_W::new(self)
204    }
205    ///Bit 17 - TIM16 timer reset
206    #[inline(always)]
207    #[must_use]
208    pub fn tim16rst(&mut self) -> TIM16RST_W<17> {
209        TIM16RST_W::new(self)
210    }
211    ///Bit 18 - TIM17 timer reset
212    #[inline(always)]
213    #[must_use]
214    pub fn tim17rst(&mut self) -> TIM17RST_W<18> {
215        TIM17RST_W::new(self)
216    }
217    ///Bit 20 - ADC reset
218    #[inline(always)]
219    #[must_use]
220    pub fn adcrst(&mut self) -> ADCRST_W<20> {
221        ADCRST_W::new(self)
222    }
223    ///Bit 21 - COMP1 reset
224    #[inline(always)]
225    #[must_use]
226    pub fn comp1rst(&mut self) -> COMP1RST_W<21> {
227        COMP1RST_W::new(self)
228    }
229    ///Bit 22 - COMP2 reset
230    #[inline(always)]
231    #[must_use]
232    pub fn comp2rst(&mut self) -> COMP2RST_W<22> {
233        COMP2RST_W::new(self)
234    }
235    ///Bit 23 - LED reset
236    #[inline(always)]
237    #[must_use]
238    pub fn ledrst(&mut self) -> LEDRST_W<23> {
239        LEDRST_W::new(self)
240    }
241    ///Writes raw bits to the register.
242    #[inline(always)]
243    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
244        self.0.bits(bits);
245        self
246    }
247}
248/**APB peripheral reset register 2
249
250This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
251
252For information about available fields see [apbrstr2](index.html) module*/
253pub struct APBRSTR2_SPEC;
254impl crate::RegisterSpec for APBRSTR2_SPEC {
255    type Ux = u32;
256}
257///`read()` method returns [apbrstr2::R](R) reader structure
258impl crate::Readable for APBRSTR2_SPEC {
259    type Reader = R;
260}
261///`write(|w| ..)` method takes [apbrstr2::W](W) writer structure
262impl crate::Writable for APBRSTR2_SPEC {
263    type Writer = W;
264    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
265    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
266}
267///`reset()` method sets APBRSTR2 to value 0
268impl crate::Resettable for APBRSTR2_SPEC {
269    const RESET_VALUE: Self::Ux = 0;
270}
py32f0/py32f030/rcc/apbrstr2.rs

py32f0/py32f030/rcc/
apbrstr2.rs
