py32f0/py32f030/gpioa/
moder.rs

1///Register `MODER` reader
2pub struct R(crate::R<MODER_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MODER_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MODER_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MODER_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `MODER` writer
17pub struct W(crate::W<MODER_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MODER_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MODER_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MODER_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `MODE0` reader - Port x configuration bits (y = 0..15)
38pub type MODE0_R = crate::FieldReader<u8, MODE0_A>;
39/**Port x configuration bits (y = 0..15)
40
41Value on reset: 3*/
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43#[repr(u8)]
44pub enum MODE0_A {
45    ///0: Input mode
46    Input = 0,
47    ///1: General purpose output mode
48    Output = 1,
49    ///2: Alternate function mode
50    Alternate = 2,
51    ///3: Analog mode
52    Analog = 3,
53}
54impl From<MODE0_A> for u8 {
55    #[inline(always)]
56    fn from(variant: MODE0_A) -> Self {
57        variant as _
58    }
59}
60impl MODE0_R {
61    ///Get enumerated values variant
62    #[inline(always)]
63    pub fn variant(&self) -> MODE0_A {
64        match self.bits {
65            0 => MODE0_A::Input,
66            1 => MODE0_A::Output,
67            2 => MODE0_A::Alternate,
68            3 => MODE0_A::Analog,
69            _ => unreachable!(),
70        }
71    }
72    ///Checks if the value of the field is `Input`
73    #[inline(always)]
74    pub fn is_input(&self) -> bool {
75        *self == MODE0_A::Input
76    }
77    ///Checks if the value of the field is `Output`
78    #[inline(always)]
79    pub fn is_output(&self) -> bool {
80        *self == MODE0_A::Output
81    }
82    ///Checks if the value of the field is `Alternate`
83    #[inline(always)]
84    pub fn is_alternate(&self) -> bool {
85        *self == MODE0_A::Alternate
86    }
87    ///Checks if the value of the field is `Analog`
88    #[inline(always)]
89    pub fn is_analog(&self) -> bool {
90        *self == MODE0_A::Analog
91    }
92}
93///Field `MODE0` writer - Port x configuration bits (y = 0..15)
94pub type MODE0_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, MODER_SPEC, u8, MODE0_A, 2, O>;
95impl<'a, const O: u8> MODE0_W<'a, O> {
96    ///Input mode
97    #[inline(always)]
98    pub fn input(self) -> &'a mut W {
99        self.variant(MODE0_A::Input)
100    }
101    ///General purpose output mode
102    #[inline(always)]
103    pub fn output(self) -> &'a mut W {
104        self.variant(MODE0_A::Output)
105    }
106    ///Alternate function mode
107    #[inline(always)]
108    pub fn alternate(self) -> &'a mut W {
109        self.variant(MODE0_A::Alternate)
110    }
111    ///Analog mode
112    #[inline(always)]
113    pub fn analog(self) -> &'a mut W {
114        self.variant(MODE0_A::Analog)
115    }
116}
117///Field `MODE1` reader - Port x configuration bits (y = 0..15)
118pub use MODE0_R as MODE1_R;
119///Field `MODE2` reader - Port x configuration bits (y = 0..15)
120pub use MODE0_R as MODE2_R;
121///Field `MODE3` reader - Port x configuration bits (y = 0..15)
122pub use MODE0_R as MODE3_R;
123///Field `MODE4` reader - Port x configuration bits (y = 0..15)
124pub use MODE0_R as MODE4_R;
125///Field `MODE5` reader - Port x configuration bits (y = 0..15)
126pub use MODE0_R as MODE5_R;
127///Field `MODE6` reader - Port x configuration bits (y = 0..15)
128pub use MODE0_R as MODE6_R;
129///Field `MODE7` reader - Port x configuration bits (y = 0..15)
130pub use MODE0_R as MODE7_R;
131///Field `MODE8` reader - Port x configuration bits (y = 0..15)
132pub use MODE0_R as MODE8_R;
133///Field `MODE9` reader - Port x configuration bits (y = 0..15)
134pub use MODE0_R as MODE9_R;
135///Field `MODE10` reader - Port x configuration bits (y = 0..15)
136pub use MODE0_R as MODE10_R;
137///Field `MODE11` reader - Port x configuration bits (y = 0..15)
138pub use MODE0_R as MODE11_R;
139///Field `MODE12` reader - Port x configuration bits (y = 0..15)
140pub use MODE0_R as MODE12_R;
141///Field `MODE13` reader - Port x configuration bits (y = 0..15)
142pub use MODE0_R as MODE13_R;
143///Field `MODE14` reader - Port x configuration bits (y = 0..15)
144pub use MODE0_R as MODE14_R;
145///Field `MODE15` reader - Port x configuration bits (y = 0..15)
146pub use MODE0_R as MODE15_R;
147///Field `MODE1` writer - Port x configuration bits (y = 0..15)
148pub use MODE0_W as MODE1_W;
149///Field `MODE2` writer - Port x configuration bits (y = 0..15)
150pub use MODE0_W as MODE2_W;
151///Field `MODE3` writer - Port x configuration bits (y = 0..15)
152pub use MODE0_W as MODE3_W;
153///Field `MODE4` writer - Port x configuration bits (y = 0..15)
154pub use MODE0_W as MODE4_W;
155///Field `MODE5` writer - Port x configuration bits (y = 0..15)
156pub use MODE0_W as MODE5_W;
157///Field `MODE6` writer - Port x configuration bits (y = 0..15)
158pub use MODE0_W as MODE6_W;
159///Field `MODE7` writer - Port x configuration bits (y = 0..15)
160pub use MODE0_W as MODE7_W;
161///Field `MODE8` writer - Port x configuration bits (y = 0..15)
162pub use MODE0_W as MODE8_W;
163///Field `MODE9` writer - Port x configuration bits (y = 0..15)
164pub use MODE0_W as MODE9_W;
165///Field `MODE10` writer - Port x configuration bits (y = 0..15)
166pub use MODE0_W as MODE10_W;
167///Field `MODE11` writer - Port x configuration bits (y = 0..15)
168pub use MODE0_W as MODE11_W;
169///Field `MODE12` writer - Port x configuration bits (y = 0..15)
170pub use MODE0_W as MODE12_W;
171///Field `MODE13` writer - Port x configuration bits (y = 0..15)
172pub use MODE0_W as MODE13_W;
173///Field `MODE14` writer - Port x configuration bits (y = 0..15)
174pub use MODE0_W as MODE14_W;
175///Field `MODE15` writer - Port x configuration bits (y = 0..15)
176pub use MODE0_W as MODE15_W;
177impl R {
178    ///Bits 0:1 - Port x configuration bits (y = 0..15)
179    #[inline(always)]
180    pub fn mode0(&self) -> MODE0_R {
181        MODE0_R::new((self.bits & 3) as u8)
182    }
183    ///Bits 2:3 - Port x configuration bits (y = 0..15)
184    #[inline(always)]
185    pub fn mode1(&self) -> MODE1_R {
186        MODE1_R::new(((self.bits >> 2) & 3) as u8)
187    }
188    ///Bits 4:5 - Port x configuration bits (y = 0..15)
189    #[inline(always)]
190    pub fn mode2(&self) -> MODE2_R {
191        MODE2_R::new(((self.bits >> 4) & 3) as u8)
192    }
193    ///Bits 6:7 - Port x configuration bits (y = 0..15)
194    #[inline(always)]
195    pub fn mode3(&self) -> MODE3_R {
196        MODE3_R::new(((self.bits >> 6) & 3) as u8)
197    }
198    ///Bits 8:9 - Port x configuration bits (y = 0..15)
199    #[inline(always)]
200    pub fn mode4(&self) -> MODE4_R {
201        MODE4_R::new(((self.bits >> 8) & 3) as u8)
202    }
203    ///Bits 10:11 - Port x configuration bits (y = 0..15)
204    #[inline(always)]
205    pub fn mode5(&self) -> MODE5_R {
206        MODE5_R::new(((self.bits >> 10) & 3) as u8)
207    }
208    ///Bits 12:13 - Port x configuration bits (y = 0..15)
209    #[inline(always)]
210    pub fn mode6(&self) -> MODE6_R {
211        MODE6_R::new(((self.bits >> 12) & 3) as u8)
212    }
213    ///Bits 14:15 - Port x configuration bits (y = 0..15)
214    #[inline(always)]
215    pub fn mode7(&self) -> MODE7_R {
216        MODE7_R::new(((self.bits >> 14) & 3) as u8)
217    }
218    ///Bits 16:17 - Port x configuration bits (y = 0..15)
219    #[inline(always)]
220    pub fn mode8(&self) -> MODE8_R {
221        MODE8_R::new(((self.bits >> 16) & 3) as u8)
222    }
223    ///Bits 18:19 - Port x configuration bits (y = 0..15)
224    #[inline(always)]
225    pub fn mode9(&self) -> MODE9_R {
226        MODE9_R::new(((self.bits >> 18) & 3) as u8)
227    }
228    ///Bits 20:21 - Port x configuration bits (y = 0..15)
229    #[inline(always)]
230    pub fn mode10(&self) -> MODE10_R {
231        MODE10_R::new(((self.bits >> 20) & 3) as u8)
232    }
233    ///Bits 22:23 - Port x configuration bits (y = 0..15)
234    #[inline(always)]
235    pub fn mode11(&self) -> MODE11_R {
236        MODE11_R::new(((self.bits >> 22) & 3) as u8)
237    }
238    ///Bits 24:25 - Port x configuration bits (y = 0..15)
239    #[inline(always)]
240    pub fn mode12(&self) -> MODE12_R {
241        MODE12_R::new(((self.bits >> 24) & 3) as u8)
242    }
243    ///Bits 26:27 - Port x configuration bits (y = 0..15)
244    #[inline(always)]
245    pub fn mode13(&self) -> MODE13_R {
246        MODE13_R::new(((self.bits >> 26) & 3) as u8)
247    }
248    ///Bits 28:29 - Port x configuration bits (y = 0..15)
249    #[inline(always)]
250    pub fn mode14(&self) -> MODE14_R {
251        MODE14_R::new(((self.bits >> 28) & 3) as u8)
252    }
253    ///Bits 30:31 - Port x configuration bits (y = 0..15)
254    #[inline(always)]
255    pub fn mode15(&self) -> MODE15_R {
256        MODE15_R::new(((self.bits >> 30) & 3) as u8)
257    }
258}
259impl W {
260    ///Bits 0:1 - Port x configuration bits (y = 0..15)
261    #[inline(always)]
262    #[must_use]
263    pub fn mode0(&mut self) -> MODE0_W<0> {
264        MODE0_W::new(self)
265    }
266    ///Bits 2:3 - Port x configuration bits (y = 0..15)
267    #[inline(always)]
268    #[must_use]
269    pub fn mode1(&mut self) -> MODE1_W<2> {
270        MODE1_W::new(self)
271    }
272    ///Bits 4:5 - Port x configuration bits (y = 0..15)
273    #[inline(always)]
274    #[must_use]
275    pub fn mode2(&mut self) -> MODE2_W<4> {
276        MODE2_W::new(self)
277    }
278    ///Bits 6:7 - Port x configuration bits (y = 0..15)
279    #[inline(always)]
280    #[must_use]
281    pub fn mode3(&mut self) -> MODE3_W<6> {
282        MODE3_W::new(self)
283    }
284    ///Bits 8:9 - Port x configuration bits (y = 0..15)
285    #[inline(always)]
286    #[must_use]
287    pub fn mode4(&mut self) -> MODE4_W<8> {
288        MODE4_W::new(self)
289    }
290    ///Bits 10:11 - Port x configuration bits (y = 0..15)
291    #[inline(always)]
292    #[must_use]
293    pub fn mode5(&mut self) -> MODE5_W<10> {
294        MODE5_W::new(self)
295    }
296    ///Bits 12:13 - Port x configuration bits (y = 0..15)
297    #[inline(always)]
298    #[must_use]
299    pub fn mode6(&mut self) -> MODE6_W<12> {
300        MODE6_W::new(self)
301    }
302    ///Bits 14:15 - Port x configuration bits (y = 0..15)
303    #[inline(always)]
304    #[must_use]
305    pub fn mode7(&mut self) -> MODE7_W<14> {
306        MODE7_W::new(self)
307    }
308    ///Bits 16:17 - Port x configuration bits (y = 0..15)
309    #[inline(always)]
310    #[must_use]
311    pub fn mode8(&mut self) -> MODE8_W<16> {
312        MODE8_W::new(self)
313    }
314    ///Bits 18:19 - Port x configuration bits (y = 0..15)
315    #[inline(always)]
316    #[must_use]
317    pub fn mode9(&mut self) -> MODE9_W<18> {
318        MODE9_W::new(self)
319    }
320    ///Bits 20:21 - Port x configuration bits (y = 0..15)
321    #[inline(always)]
322    #[must_use]
323    pub fn mode10(&mut self) -> MODE10_W<20> {
324        MODE10_W::new(self)
325    }
326    ///Bits 22:23 - Port x configuration bits (y = 0..15)
327    #[inline(always)]
328    #[must_use]
329    pub fn mode11(&mut self) -> MODE11_W<22> {
330        MODE11_W::new(self)
331    }
332    ///Bits 24:25 - Port x configuration bits (y = 0..15)
333    #[inline(always)]
334    #[must_use]
335    pub fn mode12(&mut self) -> MODE12_W<24> {
336        MODE12_W::new(self)
337    }
338    ///Bits 26:27 - Port x configuration bits (y = 0..15)
339    #[inline(always)]
340    #[must_use]
341    pub fn mode13(&mut self) -> MODE13_W<26> {
342        MODE13_W::new(self)
343    }
344    ///Bits 28:29 - Port x configuration bits (y = 0..15)
345    #[inline(always)]
346    #[must_use]
347    pub fn mode14(&mut self) -> MODE14_W<28> {
348        MODE14_W::new(self)
349    }
350    ///Bits 30:31 - Port x configuration bits (y = 0..15)
351    #[inline(always)]
352    #[must_use]
353    pub fn mode15(&mut self) -> MODE15_W<30> {
354        MODE15_W::new(self)
355    }
356    ///Writes raw bits to the register.
357    #[inline(always)]
358    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
359        self.0.bits(bits);
360        self
361    }
362}
363/**GPIO port mode register
364
365This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
366
367For information about available fields see [moder](index.html) module*/
368pub struct MODER_SPEC;
369impl crate::RegisterSpec for MODER_SPEC {
370    type Ux = u32;
371}
372///`read()` method returns [moder::R](R) reader structure
373impl crate::Readable for MODER_SPEC {
374    type Reader = R;
375}
376///`write(|w| ..)` method takes [moder::W](W) writer structure
377impl crate::Writable for MODER_SPEC {
378    type Writer = W;
379    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
380    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
381}
382///`reset()` method sets MODER to value 0xebff_ffff
383impl crate::Resettable for MODER_SPEC {
384    const RESET_VALUE: Self::Ux = 0xebff_ffff;
385}
py32f0/py32f030/gpioa/moder.rs

py32f0/py32f030/gpioa/
moder.rs
