py32f0/py32f030/gpiob/
brr.rs

1///Register `BRR` writer
2pub struct W(crate::W<BRR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<BRR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<BRR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<BRR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22/**Port Reset bit
23
24Value on reset: 0*/
25#[derive(Clone, Copy, Debug, PartialEq, Eq)]
26pub enum BR0W_AW {
27    ///0: No action on the corresponding ODx bit
28    NoAction = 0,
29    ///1: Reset the ODx bit
30    Reset = 1,
31}
32impl From<BR0W_AW> for bool {
33    #[inline(always)]
34    fn from(variant: BR0W_AW) -> Self {
35        variant as u8 != 0
36    }
37}
38///Field `BR0` writer - Port Reset bit
39pub type BR0_W<'a, const O: u8> = crate::BitWriter<'a, u32, BRR_SPEC, BR0W_AW, O>;
40impl<'a, const O: u8> BR0_W<'a, O> {
41    ///No action on the corresponding ODx bit
42    #[inline(always)]
43    pub fn no_action(self) -> &'a mut W {
44        self.variant(BR0W_AW::NoAction)
45    }
46    ///Reset the ODx bit
47    #[inline(always)]
48    pub fn reset(self) -> &'a mut W {
49        self.variant(BR0W_AW::Reset)
50    }
51}
52///Field `BR1` writer - Port Reset bit
53pub use BR0_W as BR1_W;
54///Field `BR2` writer - Port Reset bit
55pub use BR0_W as BR2_W;
56///Field `BR3` writer - Port Reset bit
57pub use BR0_W as BR3_W;
58///Field `BR4` writer - Port Reset bit
59pub use BR0_W as BR4_W;
60///Field `BR5` writer - Port Reset bit
61pub use BR0_W as BR5_W;
62///Field `BR6` writer - Port Reset bit
63pub use BR0_W as BR6_W;
64///Field `BR7` writer - Port Reset bit
65pub use BR0_W as BR7_W;
66///Field `BR8` writer - Port Reset bit
67pub use BR0_W as BR8_W;
68impl W {
69    ///Bit 0 - Port Reset bit
70    #[inline(always)]
71    #[must_use]
72    pub fn br0(&mut self) -> BR0_W<0> {
73        BR0_W::new(self)
74    }
75    ///Bit 1 - Port Reset bit
76    #[inline(always)]
77    #[must_use]
78    pub fn br1(&mut self) -> BR1_W<1> {
79        BR1_W::new(self)
80    }
81    ///Bit 2 - Port Reset bit
82    #[inline(always)]
83    #[must_use]
84    pub fn br2(&mut self) -> BR2_W<2> {
85        BR2_W::new(self)
86    }
87    ///Bit 3 - Port Reset bit
88    #[inline(always)]
89    #[must_use]
90    pub fn br3(&mut self) -> BR3_W<3> {
91        BR3_W::new(self)
92    }
93    ///Bit 4 - Port Reset bit
94    #[inline(always)]
95    #[must_use]
96    pub fn br4(&mut self) -> BR4_W<4> {
97        BR4_W::new(self)
98    }
99    ///Bit 5 - Port Reset bit
100    #[inline(always)]
101    #[must_use]
102    pub fn br5(&mut self) -> BR5_W<5> {
103        BR5_W::new(self)
104    }
105    ///Bit 6 - Port Reset bit
106    #[inline(always)]
107    #[must_use]
108    pub fn br6(&mut self) -> BR6_W<6> {
109        BR6_W::new(self)
110    }
111    ///Bit 7 - Port Reset bit
112    #[inline(always)]
113    #[must_use]
114    pub fn br7(&mut self) -> BR7_W<7> {
115        BR7_W::new(self)
116    }
117    ///Bit 8 - Port Reset bit
118    #[inline(always)]
119    #[must_use]
120    pub fn br8(&mut self) -> BR8_W<8> {
121        BR8_W::new(self)
122    }
123    ///Writes raw bits to the register.
124    #[inline(always)]
125    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
126        self.0.bits(bits);
127        self
128    }
129}
130/**port bit reset register
131
132This register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
133
134For information about available fields see [brr](index.html) module*/
135pub struct BRR_SPEC;
136impl crate::RegisterSpec for BRR_SPEC {
137    type Ux = u32;
138}
139///`write(|w| ..)` method takes [brr::W](W) writer structure
140impl crate::Writable for BRR_SPEC {
141    type Writer = W;
142    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
143    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
144}
145///`reset()` method sets BRR to value 0
146impl crate::Resettable for BRR_SPEC {
147    const RESET_VALUE: Self::Ux = 0;
148}
py32f0/py32f030/gpiob/brr.rs

py32f0/py32f030/gpiob/
brr.rs
