py32f0/py32f003/tim16/
dier.rs

1///Register `DIER` reader
2pub struct R(crate::R<DIER_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DIER_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DIER_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DIER_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `DIER` writer
17pub struct W(crate::W<DIER_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DIER_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DIER_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DIER_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `UIE` reader - Update interrupt enable
38pub type UIE_R = crate::BitReader<bool>;
39///Field `UIE` writer - Update interrupt enable
40pub type UIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, bool, O>;
41///Field `CC1IE` reader - Capture/Compare 1 interrupt enable
42pub type CC1IE_R = crate::BitReader<bool>;
43///Field `CC1IE` writer - Capture/Compare 1 interrupt enable
44pub type CC1IE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, bool, O>;
45///Field `COMIE` reader - Com interrupt enable
46pub type COMIE_R = crate::BitReader<bool>;
47///Field `COMIE` writer - Com interrupt enable
48pub type COMIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, bool, O>;
49///Field `BIE` reader - Break interrupt enable
50pub type BIE_R = crate::BitReader<bool>;
51///Field `BIE` writer - Break interrupt enable
52pub type BIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, bool, O>;
53///Field `UDE` reader - Update DMA request enable
54pub type UDE_R = crate::BitReader<bool>;
55///Field `UDE` writer - Update DMA request enable
56pub type UDE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, bool, O>;
57///Field `CC1DE` reader - Compare/capture DMA requeset enable
58pub type CC1DE_R = crate::BitReader<bool>;
59///Field `CC1DE` writer - Compare/capture DMA requeset enable
60pub type CC1DE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, bool, O>;
61impl R {
62    ///Bit 0 - Update interrupt enable
63    #[inline(always)]
64    pub fn uie(&self) -> UIE_R {
65        UIE_R::new((self.bits & 1) != 0)
66    }
67    ///Bit 1 - Capture/Compare 1 interrupt enable
68    #[inline(always)]
69    pub fn cc1ie(&self) -> CC1IE_R {
70        CC1IE_R::new(((self.bits >> 1) & 1) != 0)
71    }
72    ///Bit 5 - Com interrupt enable
73    #[inline(always)]
74    pub fn comie(&self) -> COMIE_R {
75        COMIE_R::new(((self.bits >> 5) & 1) != 0)
76    }
77    ///Bit 7 - Break interrupt enable
78    #[inline(always)]
79    pub fn bie(&self) -> BIE_R {
80        BIE_R::new(((self.bits >> 7) & 1) != 0)
81    }
82    ///Bit 8 - Update DMA request enable
83    #[inline(always)]
84    pub fn ude(&self) -> UDE_R {
85        UDE_R::new(((self.bits >> 8) & 1) != 0)
86    }
87    ///Bit 9 - Compare/capture DMA requeset enable
88    #[inline(always)]
89    pub fn cc1de(&self) -> CC1DE_R {
90        CC1DE_R::new(((self.bits >> 9) & 1) != 0)
91    }
92}
93impl W {
94    ///Bit 0 - Update interrupt enable
95    #[inline(always)]
96    #[must_use]
97    pub fn uie(&mut self) -> UIE_W<0> {
98        UIE_W::new(self)
99    }
100    ///Bit 1 - Capture/Compare 1 interrupt enable
101    #[inline(always)]
102    #[must_use]
103    pub fn cc1ie(&mut self) -> CC1IE_W<1> {
104        CC1IE_W::new(self)
105    }
106    ///Bit 5 - Com interrupt enable
107    #[inline(always)]
108    #[must_use]
109    pub fn comie(&mut self) -> COMIE_W<5> {
110        COMIE_W::new(self)
111    }
112    ///Bit 7 - Break interrupt enable
113    #[inline(always)]
114    #[must_use]
115    pub fn bie(&mut self) -> BIE_W<7> {
116        BIE_W::new(self)
117    }
118    ///Bit 8 - Update DMA request enable
119    #[inline(always)]
120    #[must_use]
121    pub fn ude(&mut self) -> UDE_W<8> {
122        UDE_W::new(self)
123    }
124    ///Bit 9 - Compare/capture DMA requeset enable
125    #[inline(always)]
126    #[must_use]
127    pub fn cc1de(&mut self) -> CC1DE_W<9> {
128        CC1DE_W::new(self)
129    }
130    ///Writes raw bits to the register.
131    #[inline(always)]
132    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
133        self.0.bits(bits);
134        self
135    }
136}
137/**DMA/Interrupt enable register
138
139This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
140
141For information about available fields see [dier](index.html) module*/
142pub struct DIER_SPEC;
143impl crate::RegisterSpec for DIER_SPEC {
144    type Ux = u32;
145}
146///`read()` method returns [dier::R](R) reader structure
147impl crate::Readable for DIER_SPEC {
148    type Reader = R;
149}
150///`write(|w| ..)` method takes [dier::W](W) writer structure
151impl crate::Writable for DIER_SPEC {
152    type Writer = W;
153    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
154    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
155}
156///`reset()` method sets DIER to value 0
157impl crate::Resettable for DIER_SPEC {
158    const RESET_VALUE: Self::Ux = 0;
159}
py32f0/py32f003/tim16/dier.rs

py32f0/py32f003/tim16/
dier.rs
