py32f0/py32f030/i2c/
sr2.rs

///Register `SR2` reader
pub struct R(crate::R<SR2_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<SR2_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<SR2_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<SR2_SPEC>) -> Self {
        R(reader)
    }
}
///Field `MSL` reader - Master/slave
pub type MSL_R = crate::BitReader<MSLR_A>;
/**Master/slave

Value on reset: 0*/
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum MSLR_A {
    ///0: Slave mode
    Slave = 0,
    ///1: Master mode
    Master = 1,
}
impl From<MSLR_A> for bool {
    #[inline(always)]
    fn from(variant: MSLR_A) -> Self {
        variant as u8 != 0
    }
}
impl MSL_R {
    ///Get enumerated values variant
    #[inline(always)]
    pub fn variant(&self) -> MSLR_A {
        match self.bits {
            false => MSLR_A::Slave,
            true => MSLR_A::Master,
        }
    }
    ///Checks if the value of the field is `Slave`
    #[inline(always)]
    pub fn is_slave(&self) -> bool {
        *self == MSLR_A::Slave
    }
    ///Checks if the value of the field is `Master`
    #[inline(always)]
    pub fn is_master(&self) -> bool {
        *self == MSLR_A::Master
    }
}
///Field `BUSY` reader - Bus busy
pub type BUSY_R = crate::BitReader<BUSYR_A>;
/**Bus busy

Value on reset: 0*/
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum BUSYR_A {
    ///0: No communication on bus
    NotBusy = 0,
    ///1: Bus busy
    Busy = 1,
}
impl From<BUSYR_A> for bool {
    #[inline(always)]
    fn from(variant: BUSYR_A) -> Self {
        variant as u8 != 0
    }
}
impl BUSY_R {
    ///Get enumerated values variant
    #[inline(always)]
    pub fn variant(&self) -> BUSYR_A {
        match self.bits {
            false => BUSYR_A::NotBusy,
            true => BUSYR_A::Busy,
        }
    }
    ///Checks if the value of the field is `NotBusy`
    #[inline(always)]
    pub fn is_not_busy(&self) -> bool {
        *self == BUSYR_A::NotBusy
    }
    ///Checks if the value of the field is `Busy`
    #[inline(always)]
    pub fn is_busy(&self) -> bool {
        *self == BUSYR_A::Busy
    }
}
///Field `TRA` reader - Transmitter/receiver
pub type TRA_R = crate::BitReader<TRAR_A>;
/**Transmitter/receiver

Value on reset: 0*/
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum TRAR_A {
    ///0: Data received flag
    Received = 0,
    ///1: Data transferred flag
    Transferred = 1,
}
impl From<TRAR_A> for bool {
    #[inline(always)]
    fn from(variant: TRAR_A) -> Self {
        variant as u8 != 0
    }
}
impl TRA_R {
    ///Get enumerated values variant
    #[inline(always)]
    pub fn variant(&self) -> TRAR_A {
        match self.bits {
            false => TRAR_A::Received,
            true => TRAR_A::Transferred,
        }
    }
    ///Checks if the value of the field is `Received`
    #[inline(always)]
    pub fn is_received(&self) -> bool {
        *self == TRAR_A::Received
    }
    ///Checks if the value of the field is `Transferred`
    #[inline(always)]
    pub fn is_transferred(&self) -> bool {
        *self == TRAR_A::Transferred
    }
}
///Field `GENCALL` reader - General call address (Slave mode)
pub type GENCALL_R = crate::BitReader<GENCALLR_A>;
/**General call address (Slave mode)

Value on reset: 0*/
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum GENCALLR_A {
    ///0: Not receive general call address
    NoGeneralCallRecv = 0,
    ///1: When ENGC=1, received a general call address
    GeneralCallRecv = 1,
}
impl From<GENCALLR_A> for bool {
    #[inline(always)]
    fn from(variant: GENCALLR_A) -> Self {
        variant as u8 != 0
    }
}
impl GENCALL_R {
    ///Get enumerated values variant
    #[inline(always)]
    pub fn variant(&self) -> GENCALLR_A {
        match self.bits {
            false => GENCALLR_A::NoGeneralCallRecv,
            true => GENCALLR_A::GeneralCallRecv,
        }
    }
    ///Checks if the value of the field is `NoGeneralCallRecv`
    #[inline(always)]
    pub fn is_no_general_call_recv(&self) -> bool {
        *self == GENCALLR_A::NoGeneralCallRecv
    }
    ///Checks if the value of the field is `GeneralCallRecv`
    #[inline(always)]
    pub fn is_general_call_recv(&self) -> bool {
        *self == GENCALLR_A::GeneralCallRecv
    }
}
///Field `DUALF` reader - Dual flag (Slave mode)
pub type DUALF_R = crate::BitReader<bool>;
///Field `PEC` reader - acket error checking register
pub type PEC_R = crate::FieldReader<u8, u8>;
impl R {
    ///Bit 0 - Master/slave
    #[inline(always)]
    pub fn msl(&self) -> MSL_R {
        MSL_R::new((self.bits & 1) != 0)
    }
    ///Bit 1 - Bus busy
    #[inline(always)]
    pub fn busy(&self) -> BUSY_R {
        BUSY_R::new(((self.bits >> 1) & 1) != 0)
    }
    ///Bit 2 - Transmitter/receiver
    #[inline(always)]
    pub fn tra(&self) -> TRA_R {
        TRA_R::new(((self.bits >> 2) & 1) != 0)
    }
    ///Bit 4 - General call address (Slave mode)
    #[inline(always)]
    pub fn gencall(&self) -> GENCALL_R {
        GENCALL_R::new(((self.bits >> 4) & 1) != 0)
    }
    ///Bit 7 - Dual flag (Slave mode)
    #[inline(always)]
    pub fn dualf(&self) -> DUALF_R {
        DUALF_R::new(((self.bits >> 7) & 1) != 0)
    }
    ///Bits 8:15 - acket error checking register
    #[inline(always)]
    pub fn pec(&self) -> PEC_R {
        PEC_R::new(((self.bits >> 8) & 0xff) as u8)
    }
}
/**Status register 2

This register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).

For information about available fields see [sr2](index.html) module*/
pub struct SR2_SPEC;
impl crate::RegisterSpec for SR2_SPEC {
    type Ux = u32;
}
///`read()` method returns [sr2::R](R) reader structure
impl crate::Readable for SR2_SPEC {
    type Reader = R;
}
///`reset()` method sets SR2 to value 0
impl crate::Resettable for SR2_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}
py32f0/py32f030/i2c/sr2.rs

py32f0/py32f030/i2c/
sr2.rs
