Skip to main content

py32csdk_hal_sys/prebuild/py32f030/
interrupt.rs

1
2#[cfg(feature = "rt")]
3pub use cortex_m_rt::interrupt;
4#[cfg(feature = "rt")]
5pub use self::Interrupt as interrupt;
6
7pub union Vector {
8    handler: unsafe extern "C" fn(),
9    reserved: usize,
10}
11
12extern "C" {
13    fn RCC();
14    fn RTC();
15    fn EXTI4_15();
16    fn LED();
17    fn TIM3();
18    fn TIM1_CC();
19    fn EXTI2_3();
20    fn WWDG();
21    fn USART2();
22    fn USART1();
23    fn TIM14();
24    fn DMA1_CHANNEL2_3();
25    fn TIM1_BRK_UP_TRG_COM();
26    fn DMA1_CHANNEL1();
27    fn TIM17();
28    fn ADC_COMP();
29    fn LPTIM1();
30    fn TIM16();
31    fn I2C1();
32    fn SPI2();
33    fn EXTI0_1();
34    fn PVD();
35    fn SPI1();
36    fn FLASH();
37    
38}
39
40#[link_section = ".vector_table.interrupts"]
41#[no_mangle]
42pub static __INTERRUPTS: [Vector; 32] = [
43    Vector { handler: WWDG },
44    Vector { handler: PVD },
45    Vector { handler: RTC },
46    Vector { handler: FLASH },
47    Vector { handler: RCC },
48    Vector { handler: EXTI0_1 },
49    Vector { handler: EXTI2_3 },
50    Vector { handler: EXTI4_15 },
51    Vector { reserved: 0 },
52    Vector { handler: DMA1_CHANNEL1 },
53    Vector { handler: DMA1_CHANNEL2_3 },
54    Vector { reserved: 0 },
55    Vector { handler: ADC_COMP },
56    Vector { handler: TIM1_BRK_UP_TRG_COM },
57    Vector { handler: TIM1_CC },
58    Vector { reserved: 0 },
59    Vector { handler: TIM3 },
60    Vector { handler: LPTIM1 },
61    Vector { reserved: 0 },
62    Vector { handler: TIM14 },
63    Vector { reserved: 0 },
64    Vector { handler: TIM16 },
65    Vector { handler: TIM17 },
66    Vector { handler: I2C1 },
67    Vector { reserved: 0 },
68    Vector { handler: SPI1 },
69    Vector { handler: SPI2 },
70    Vector { handler: USART1 },
71    Vector { handler: USART2 },
72    Vector { reserved: 0 },
73    Vector { handler: LED },
74    Vector { reserved: 0 },
75];
76
77#[doc = r"Enumeration of all the interrupts."]
78#[derive(Copy, Clone, Debug, PartialEq, Eq)]
79#[repr(u16)]
80pub enum Interrupt {
81    #[doc = "0 - WWDG interrupt"]
82    WWDG = 0,
83    #[doc = "1 - PVD interrupt"]
84    PVD = 1,
85    #[doc = "2 - RTC interrupt"]
86    RTC = 2,
87    #[doc = "3 - FLASH interrupt"]
88    FLASH = 3,
89    #[doc = "4 - RCC interrupt"]
90    RCC = 4,
91    #[doc = "5 - EXTI0_1 interrupt"]
92    EXTI0_1 = 5,
93    #[doc = "6 - EXTI2_3 interrupt"]
94    EXTI2_3 = 6,
95    #[doc = "7 - EXTI4_15 interrupt"]
96    EXTI4_15 = 7,
97    #[doc = "9 - DMA1_CHANNEL1 interrupt"]
98    DMA1_CHANNEL1 = 9,
99    #[doc = "10 - DMA1_CHANNEL2_3 interrupt"]
100    DMA1_CHANNEL2_3 = 10,
101    #[doc = "12 - ADC_COMP interrupt"]
102    ADC_COMP = 12,
103    #[doc = "13 - TIM1_BRK_UP_TRG_COM interrupt"]
104    TIM1_BRK_UP_TRG_COM = 13,
105    #[doc = "14 - TIM1_CC interrupt"]
106    TIM1_CC = 14,
107    #[doc = "16 - TIM3 interrupt"]
108    TIM3 = 16,
109    #[doc = "17 - LPTIM1 interrupt"]
110    LPTIM1 = 17,
111    #[doc = "19 - TIM14 interrupt"]
112    TIM14 = 19,
113    #[doc = "21 - TIM16 interrupt"]
114    TIM16 = 21,
115    #[doc = "22 - TIM17 interrupt"]
116    TIM17 = 22,
117    #[doc = "23 - I2C1 interrupt"]
118    I2C1 = 23,
119    #[doc = "25 - SPI1 interrupt"]
120    SPI1 = 25,
121    #[doc = "26 - SPI2 interrupt"]
122    SPI2 = 26,
123    #[doc = "27 - USART1 interrupt"]
124    USART1 = 27,
125    #[doc = "28 - USART2 interrupt"]
126    USART2 = 28,
127    #[doc = "30 - LED interrupt"]
128    LED = 30,
129}
130
131unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
132    #[inline(always)]
133    fn number(self) -> u16 {
134        self as u16
135    }
136}