Expand description
Target specific configuration
For debugging and flashing different chips, called target in probe-rs, some target specific configuration is required. This includes the architecture of the chip, e.g. RISC-V or ARM, and information about the memory map of the target, which can be used together with a flash algorithm to program the flash memory of a target.
§Built-in targets
The built-in targets are added at build-time, from the build.rs script.
They are generated from the target files in the targets/ subfolder of this
crate.
The built-in targets can be disabled by not including the builtin-targets feature.
§Adding targets at runtime
Targets are collected in a Registry in families. A registry with the built-in
targets can be created via the Registry::from_builtin_families function.
To add a target at runtime, use Registry::add_target_family. The target family
is a ChipFamily struct, usually read from a target description YAML file.
Structs§
- Chip
- A single chip variant.
- Chip
Family - This describes a chip family with all its variants.
- Core
- An individual core inside a chip
- Flash
Properties - Properties of flash memory, which are used when programming Flash memory.
- Generic
Region - Represents a generic region.
- Memory
Access - Represents access permissions of a region in RAM.
- NvmRegion
- Represents a region in non-volatile memory (e.g. flash or EEPROM).
- Page
Info - Holds information about a page in flash.
- RamRegion
- Represents a region in RAM.
- RawFlash
Algorithm - The raw flash algorithm is the description of a flash algorithm, and is usually read from a target description file.
- Registry
- Registry of all available targets.
- Scan
Chain Element - Represents a DAP scan chain element.
- Sector
Description - Information about a group of flash sectors, which
is used as part of the
FlashPropertiesstruct. - Sector
Info - Holds information about a specific, individual flash sector.
- Target
- This describes a complete target with a fixed chip model and variant.
Enums§
- Core
Type - Type of a supported core.
- Debug
Sequence - This is the type to denote a general debug sequence. It can differentiate between ARM and RISC-V for now.
- Endian
- The current endianness of a core
- Instruction
Set - Instruction set used by a core
- Memory
Region - Declares the type of a memory region.
- Registry
Error - Error type for all errors which occur when working with the internal registry of targets.
- Target
Description Source - Source of a target description.
- Target
Selector - Selector for the debug target.
Traits§
- Memory
Range - Enables the user to do range intersection testing.