Struct probe_rs::architecture::arm::component::Itm

pub struct Itm<'a> { /* private fields */ }

An interface to control the ITM (Instrumentation Trace Macrocell) of a MCU.

The ITM generates trace information as packets. There are four sources that can generate packets. If multiple sources generate packets at the same time, the ITM arbitrates the order in which packets are output.

All the information is single direction Target -> Host.

The four sources in decreasing order of priority are:

• Software trace. Software can write directly to ITM stimulus registers to generate packets.
• Hardware trace. The DWT generates these packets, and the ITM outputs them.
• Time stamping. Timestamps are generated relative to packets. The ITM contains a 21-bit counter to generate the timestamp. The Cortex-M4 clock or the bitclock rate of the Serial Wire Viewer (SWV) output clocks the counter.
• Global system timestamping. Timestamps can optionally be generated using a system-wide 48-bit count value. The same count value can be used to insert timestamps in the ETM trace stream, allowing coarse-grain correlation.

Implementations

impl<'a> Itm<'a>

pub fn new(
    interface: &'a mut dyn ArmProbeInterface,
    component: &'a CoresightComponent
) -> Self

Create a new ITM interface from a probe and a ROM table component.

pub fn unlock(&mut self) -> Result<(), Error>

Unlock the ITM and enable it for tracing the target.

This function enables the ITM unit as a whole. It does not actually send any data after enabling it.

To enable actual transaction of data, see Itm::tx_enable.

pub fn tx_enable(&mut self) -> Result<(), Error>

Enable the ITM TX to send tracing data to the TPIU.

This enables the actual TX pin of the overarching TPIU which is the parent peripheral of the ITM that multiplexes all data.