Module simd 

Cranelift-SIMD compute kernels for element-wise vector math (type_system_alignment.md §4 heap-slice plane, §7 execution eligibility).

Four f32-lane kernels are compiled once per process through the same host ISA the graph JIT uses (host_isa::build_host_isa); SIMD types are unconditional in Cranelift IR. Each kernel processes the slice body in F32X4 chunks (unaligned 128-bit loads — SliceArc<f32> data is only 4-aligned) and finishes the remainder in a scalar loop:

• dot_f32(a, b, len) -> f32 — F32X4 multiply-accumulate, horizontal reduce, scalar tail.
• l2sq_f32(a, b, len) -> f32 — squared-difference accumulate; callers take the square root.
• add_f32(a, b, out, len) — element-wise sum.
• scale_f32(a, k, out, len) — scalar broadcast multiply (splat).

Consumers are the f32 bodies in crate::numeric::vector, shared by the vec_* nodes (polydat-nodes vector_math) and by the JIT’s vector helpers; each body falls back to its scalar loop when the jit feature is off or the kernels failed to compile. SIMD accumulation reassociates floating-point addition, so results may differ from the scalar reference in the final ulps; the equivalence tests compare with relative tolerance.

Structs

SimdKernels

Finalized SIMD kernel entry points. The owning JITModule is kept alive alongside the pointers (dropping it would unmap the code pages).

Functions

kernels

The process-wide SIMD kernel set, compiled on first use. None when the host ISA cannot be built or the kernels fail to compile — callers fall back to their scalar loops.