Function picorv32::asm::maskirq

pub unsafe fn maskirq(mask: u32) -> u32

maskirq instruction wrapper

Original documentation from [https://github.com/cliffordwolf/picorv32/blob/master/README.md#maskirq]:

The "IRQ Mask" register contains a bitmask of masked (disabled) interrupts. This instruction writes a new value to the irq mask register and reads the old value.

0000011 ----- XXXXX --- XXXXX 0001011
f7      rs2   rs    f3  rd    opcode

Example:

maskirq x1, x2

The processor starts with all interrupts disabled.

An illegal instruction or bus error while the illegal instruction or bus error interrupt is disabled will cause the processor to halt.