pub type TIMER1 = Reg<TIMER1_SPEC>;Expand description
TIMER1 (rw) register accessor: Control whether debugger, DMA, core 0 and core 1 can access TIMER1, and at what security/privilege levels they can do so. Defaults to Secure access from any master. This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.
You can read this register and get timer1::R. You can reset, write, write_with_zero this register using timer1::W. You can also modify this register. See API.
For information about available fields see timer1
module
Aliased Typeยง
pub struct TIMER1 { /* private fields */ }