UART0

Type Alias UART0 

Source
pub type UART0 = Reg<UART0_SPEC>;
Expand description

UART0 (rw) register accessor: Control whether debugger, DMA, core 0 and core 1 can access UART0, and at what security/privilege levels they can do so. Defaults to Secure access from any master. This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.

You can read this register and get uart0::R. You can reset, write, write_with_zero this register using uart0::W. You can also modify this register. See API.

For information about available fields see uart0 module

Aliased Typeยง

pub struct UART0 { /* private fields */ }