Expand description
Access to the MIPS core timer and implementation of the DelayMs/DelayUs
trait
Uses the MIPS CP0 registers “count” and “compare”.
Structs§
- Delay
- Delay implementation based on read-only access to the core timer “count” register
- Timer
- Direct access to the MIPS core timer (CP0 timer) and related interrupt control
Functions§
- read_
count - Read count register (CP0 register 9, select 0)