Crate phytium_mci 

phytium-mci

A no_std SD/MMC host controller driver for Phytium E2000 series SoCs.

Overview

This crate provides a comprehensive driver for SD/MMC cards on Phytium platforms, supporting both SD and eMMC cards with DMA and PIO transfer modes.

Features

• Full SD Specification Support: SDSC, SDHC, SDXC (versions 1.0-3.0)
• eMMC Support: MMC protocol implementation
• Flexible Transfer Modes: DMA (high-performance) and PIO (simple)
• Voltage Support: 3.3V (default) and 1.8V (UHS-I modes)
• Bus Widths: 1-bit, 4-bit, and 8-bit (eMMC) data bus
• High-Speed Modes: SDR12, SDR25, SDR50, SDR104, DDR50
• Clock Speed: From 400 KHz to 208 MHz
• Card Detection: GPIO-based and host-based
• Interrupt Support: Command, data, and card detection interrupts

Architecture

The driver is organized into distinct layers:

Application Layer    (SdCard, MCIHost - High-level API)
       ↓
Protocol Layer       (Command/Data transfer, Card initialization)
       ↓
Hardware Abstraction (Register access, DMA/PIO control)
       ↓
Hardware Support     (IoPad pin configuration, OSA memory/timing)

Modules

• iopad - I/O pad configuration for pin multiplexing
• mci - Hardware controller driver (register access, DMA/PIO, interrupts)
• mci_host - Host controller protocol layer (SD/MMC protocol)
• osa - OS abstraction layer (memory management, event flags)

Platform Integration

To use this driver, you must implement the Kernel trait to provide platform-specific functionality:

use phytium_mci::{Kernel, set_impl};
use core::{ptr::NonNull, time::Duration};

struct MyPlatform;

impl Kernel for MyPlatform {
    fn sleep(duration: Duration) {
        // Platform-specific delay implementation
    }

    #[cfg(feature = "dma")]
    fn mmap(virt_addr: NonNull<u8>) -> u64 {
        // Virtual to physical address translation
    }

    fn flush(addr: NonNull<u8>, size: usize) {
        // Cache clean for DMA
    }

    fn invalidate(addr: NonNull<u8>, size: usize) {
        // Cache invalidate for DMA
    }
}

// Register your implementation
set_impl!(MyPlatform);

Hardware Configuration

Target Hardware:

• SoC: Phytium E2000 series (ARMv8-A)
• Board: Phytium Pi development board
• Controller: Phytium SDIF (Synopsys DesignWare-based)
• MCI0 Base: 0x2800_1000
• MCI1 Base: 0x2800_2000
• IOPAD Base: 0x2800_0000

Example

use phytium_mci::{sd::SdCard, IoPad};
use core::ptr::NonNull;

// Initialize IOPAD
let iopad = unsafe { IoPad::new(NonNull::new_unchecked(0x2800_0000 as *mut u8)) };

// Create SD card instance
let mut sdcard = unsafe {
    SdCard::new(
        NonNull::new_unchecked(0x2800_1000 as *mut u8),
        iopad
    )
};

// Initialize the card
sdcard.init(NonNull::new_unchecked(0x2800_1000 as *mut u8))?;

// Read blocks
let mut buffer = Vec::new();
sdcard.read_blocks(&mut buffer, 0, 1)?;

Re-exports

pub use iopad::*;

pub use mci_host::*;

Modules

iopad

I/O Pad (IOPAD) configuration for Phytium SoCs.

mci

MCI (Memory Card Interface) hardware controller driver.

mci_host

MMC/SD Host Controller Protocol Layer.

osa

OS Abstraction Layer (OSA).

Macros

BitsOpsForU32

Implements bitwise operations between a flag type and u32.

X_REG0

Macro to define a REG0 type register.

X_REG1

Macro to define a REG1 type register.

genmask

Creates a contiguous bitmask starting at bit position l and ending at position h.

genmask_ull

Creates a contiguous bitmask for 64-bit values.

get_reg32_bits

Extracts a bit field from a 32-bit register value.

set_impl

Register a platform-specific implementation of the Kernel trait.

set_reg32_bits

Prepares a value to be written to a bit field in a 32-bit register.

Traits

Kernel

Platform abstraction trait for phytium-mci driver.