PCI bus management
This crate defines various traits, functions, and types for working with the PCI local bus.
It is assumed that PCI(e) is already configured - that is, that each device has been allocated the memory it requests and the BARs are already configured correctly. The firmware (BIOS, UEFI) usually does this on PC platforms.
This crate is not yet suitable for multicore use - nothing is synchronized.
This crate does not yet contain any hardware-specific workarounds for buggy or broken hardware.
This crate cannot yet exploit PCIe memory-mapped configuration spaces.
This crate only supports x86, currently.
Physical location of a device on the bus
A device on the PCI bus.
A trait defining port I/O operations.