pci_driver/
interrupts.rs

1// SPDX-License-Identifier: MIT OR Apache-2.0
2
3/* ---------------------------------------------------------------------------------------------- */
4
5use std::io;
6use std::os::unix::io::RawFd;
7
8use crate::device::PciDeviceInternal;
9
10/* ---------------------------------------------------------------------------------------------- */
11
12/// Gives you control over a PCI device's interrupt mechanisms: INTx, MSI, and MSI-X.
13///
14/// Each device may only support a subset of these mechanisms. The [`PciInterruptMechanism::max`]
15/// method returns 0 for unsupported mechanisms.
16pub struct PciInterrupts<'a> {
17    pub(crate) device: &'a dyn PciDeviceInternal,
18}
19
20impl PciInterrupts<'_> {
21    /// Returns a thing that gives you control over a PCI device's INTx interrupts.
22    pub fn intx(&self) -> PciInterruptMechanism {
23        PciInterruptMechanism {
24            device_internal: self.device,
25            kind: PciInterruptKind::Intx,
26        }
27    }
28
29    /// Returns a thing that gives you control over a PCI device's MSI interrupts.
30    pub fn msi(&self) -> PciInterruptMechanism {
31        PciInterruptMechanism {
32            device_internal: self.device,
33            kind: PciInterruptKind::Msi,
34        }
35    }
36
37    /// Returns a thing that gives you control over a PCI device's MSI-X interrupts.
38    pub fn msi_x(&self) -> PciInterruptMechanism {
39        PciInterruptMechanism {
40            device_internal: self.device,
41            kind: PciInterruptKind::MsiX,
42        }
43    }
44}
45
46/* ---------------------------------------------------------------------------------------------- */
47
48/// Gives you control over a PCI device's specific interrupt mechanism, which may be INTx, MSI, or
49/// MSI-X.
50pub struct PciInterruptMechanism<'a> {
51    pub(crate) device_internal: &'a dyn PciDeviceInternal,
52    pub(crate) kind: PciInterruptKind,
53}
54
55impl PciInterruptMechanism<'_> {
56    /// Maximum number of vectors that may be enabled for this particular interrupt mechanism.
57    pub fn max(&self) -> usize {
58        self.device_internal.interrupts_max(self.kind)
59    }
60
61    /// Enables vectors `0` through `eventfds.len() - 1` of this particular interrupt mechanism.
62    ///
63    /// Fails if `eventfds.len() > self.max()`.
64    pub fn enable(&self, eventfds: &[RawFd]) -> io::Result<()> {
65        self.device_internal.interrupts_enable(self.kind, eventfds)
66    }
67
68    /// Disables all enabled vectors of this particular interrupt mechanism.
69    pub fn disable(&self) -> io::Result<()> {
70        self.device_internal.interrupts_disable(self.kind)
71    }
72
73    // TODO: Add interrupt masking? VFIO only supports masking INTx interrupts, though.
74}
75
76/* ---------------------------------------------------------------------------------------------- */
77
78#[derive(Clone, Copy, Debug, Eq, PartialEq)]
79pub(crate) enum PciInterruptKind {
80    Intx = 0,
81    Msi = 1,
82    MsiX = 2,
83}
84
85/* ---------------------------------------------------------------------------------------------- */
pci_driver/interrupts.rs

pci_driver/
interrupts.rs
