particle_xenon/
lib.rs

1#![no_std]
2
3pub mod prelude {
4    pub use nrf52840_hal::prelude::*;
5}
6
7use nrf52840_hal::{
8    gpio::{p0, p1, Floating, Input},
9    prelude::*,
10    target::{self as pac, CorePeripherals, Peripherals},
11    // uarte, Uarte,
12};
13
14#[allow(non_snake_case)]
15pub struct Board {
16    pub pins: Pins,
17
18    /// Core peripheral: Cache and branch predictor maintenance operations
19    pub CBP: pac::CBP,
20
21    /// Core peripheral: CPUID
22    pub CPUID: pac::CPUID,
23
24    /// Core peripheral: Debug Control Block
25    pub DCB: pac::DCB,
26
27    /// Core peripheral: Data Watchpoint and Trace unit
28    pub DWT: pac::DWT,
29
30    /// Core peripheral: Flash Patch and Breakpoint unit
31    pub FPB: pac::FPB,
32
33    /// Core peripheral: Floating Point Unit
34    pub FPU: pac::FPU,
35
36    /// Core peripheral: Instrumentation Trace Macrocell
37    pub ITM: pac::ITM,
38
39    /// Core peripheral: Memory Protection Unit
40    pub MPU: pac::MPU,
41
42    /// Core peripheral: Nested Vector Interrupt Controller
43    pub NVIC: pac::NVIC,
44
45    /// Core peripheral: System Control Block
46    pub SCB: pac::SCB,
47
48    /// Core peripheral: SysTick Timer
49    pub SYST: pac::SYST,
50
51    /// Core peripheral: Trace Port Interface Unit
52    pub TPIU: pac::TPIU,
53
54    /// nRF52 peripheral: FICR
55    pub FICR: pac::FICR,
56
57    /// nRF52 peripheral: UICR
58    pub UICR: pac::UICR,
59
60    /// nRF52 peripheral: POWER
61    pub POWER: pac::POWER,
62
63    /// nRF52 peripheral: CLOCK
64    pub CLOCK: pac::CLOCK,
65
66    /// nRF52 peripheral: RADIO
67    pub RADIO: pac::RADIO,
68
69    /// nRF52 peripheral: UART0
70    pub UART0: pac::UART0,
71
72    /// nRF52 peripheral: SPIM0
73    pub SPIM0: pac::SPIM0,
74
75    /// nRF52 peripheral: SPIS0
76    pub SPIS0: pac::SPIS0,
77
78    /// nRF52 peripheral: TWIM0
79    pub TWIM0: pac::TWIM0,
80
81    /// nRF52 peripheral: TWIS0
82    pub TWIS0: pac::TWIS0,
83
84    /// nRF52 peripheral: SPI0
85    pub SPI0: pac::SPI0,
86
87    /// nRF52 peripheral: TWI0
88    pub TWI0: pac::TWI0,
89
90    /// nRF52 peripheral: SPIM1
91    pub SPIM1: pac::SPIM1,
92
93    /// nRF52 peripheral: SPIS1
94    pub SPIS1: pac::SPIS1,
95
96    /// nRF52 peripheral: TWIS1
97    pub TWIS1: pac::TWIS1,
98
99    /// nRF52 peripheral: SPI1
100    pub SPI1: pac::SPI1,
101
102    /// nRF52 peripheral: TWI1
103    pub TWI1: pac::TWI1,
104
105    /// nRF52 peripheral: NFCT
106    pub NFCT: pac::NFCT,
107
108    /// nRF52 peripheral: GPIOTE
109    pub GPIOTE: pac::GPIOTE,
110
111    /// nRF52 peripheral: SAADC
112    pub SAADC: pac::SAADC,
113
114    /// nRF52 peripheral: TIMER0
115    pub TIMER0: pac::TIMER0,
116
117    /// nRF52 peripheral: TIMER1
118    pub TIMER1: pac::TIMER1,
119
120    /// nRF52 peripheral: TIMER2
121    pub TIMER2: pac::TIMER2,
122
123    /// nRF52 peripheral: RTC0
124    pub RTC0: pac::RTC0,
125
126    /// nRF52 peripheral: TEMP
127    pub TEMP: pac::TEMP,
128
129    /// nRF52 peripheral: RNG
130    pub RNG: pac::RNG,
131
132    /// nRF52 peripheral: ECB
133    pub ECB: pac::ECB,
134
135    /// nRF52 peripheral: CCM
136    pub CCM: pac::CCM,
137
138    /// nRF52 peripheral: AAR
139    pub AAR: pac::AAR,
140
141    /// nRF52 peripheral: WDT
142    pub WDT: pac::WDT,
143
144    /// nRF52 peripheral: RTC1
145    pub RTC1: pac::RTC1,
146
147    /// nRF52 peripheral: QDEC
148    pub QDEC: pac::QDEC,
149
150    /// nRF52 peripheral: COMP
151    pub COMP: pac::COMP,
152
153    /// nRF52 peripheral: LPCOMP
154    pub LPCOMP: pac::LPCOMP,
155
156    /// nRF52 peripheral: SWI0
157    pub SWI0: pac::SWI0,
158
159    /// nRF52 peripheral: EGU0
160    pub EGU0: pac::EGU0,
161
162    /// nRF52 peripheral: SWI1
163    pub SWI1: pac::SWI1,
164
165    /// nRF52 peripheral: EGU1
166    pub EGU1: pac::EGU1,
167
168    /// nRF52 peripheral: SWI2
169    pub SWI2: pac::SWI2,
170
171    /// nRF52 peripheral: EGU2
172    pub EGU2: pac::EGU2,
173
174    /// nRF52 peripheral: SWI3
175    pub SWI3: pac::SWI3,
176
177    /// nRF52 peripheral: EGU3
178    pub EGU3: pac::EGU3,
179
180    /// nRF52 peripheral: SWI4
181    pub SWI4: pac::SWI4,
182
183    /// nRF52 peripheral: EGU4
184    pub EGU4: pac::EGU4,
185
186    /// nRF52 peripheral: SWI5
187    pub SWI5: pac::SWI5,
188
189    /// nRF52 peripheral: EGU5
190    pub EGU5: pac::EGU5,
191
192    /// nRF52 peripheral: TIMER3
193    pub TIMER3: pac::TIMER3,
194
195    /// nRF52 peripheral: TIMER4
196    pub TIMER4: pac::TIMER4,
197
198    /// nRF52 peripheral: PWM0
199    pub PWM0: pac::PWM0,
200
201    /// nRF52 peripheral: PDM
202    pub PDM: pac::PDM,
203
204    /// nRF52 peripheral: NVMC
205    pub NVMC: pac::NVMC,
206
207    /// nRF52 peripheral: PPI
208    pub PPI: pac::PPI,
209
210    /// nRF52 peripheral: MWU
211    pub MWU: pac::MWU,
212
213    /// nRF52 peripheral: PWM1
214    pub PWM1: pac::PWM1,
215
216    /// nRF52 peripheral: PWM2
217    pub PWM2: pac::PWM2,
218
219    /// nRF52 peripheral: RTC2
220    pub RTC2: pac::RTC2,
221
222    /// nRF52 peripheral: I2S
223    pub I2S: pac::I2S,
224}
225
226impl Board {
227    pub fn take() -> Option<Self> {
228        Some(Self::new(CorePeripherals::take()?, Peripherals::take()?))
229    }
230
231    pub unsafe fn steal() -> Self {
232        Self::new(CorePeripherals::steal(), Peripherals::steal())
233    }
234
235    pub fn new(cp: CorePeripherals, p: Peripherals) -> Self {
236        // TODO update for next release
237        // let pins0 = p0::Parts::new(p.P0);
238        // let pins1 = p1::Parts::new(p.P1);
239        let pins0 = p.P0.split();
240        let pins1 = p.P1.split();
241
242        Self {
243            pins: Pins {
244                rst: pins0.p0_18,
245                mode: pins0.p0_11,
246                a0: pins0.p0_03,
247                a1: pins0.p0_04,
248                a2: pins0.p0_28,
249                a3: pins0.p0_29,
250                a4: pins0.p0_30,
251                a5: pins0.p0_31,
252                sck: pins1.p1_15,
253                mosi: pins1.p1_13,
254                miso: pins1.p1_14,
255                rx: pins0.p0_08,
256                tx: pins0.p0_06,
257                d0: pins0.p0_26,
258                d1: pins0.p0_27,
259                d2: pins1.p1_01,
260                d3: pins1.p1_02,
261                d4: pins1.p1_08,
262                d5: pins1.p1_10,
263                d6: pins1.p1_11,
264                d7: pins1.p1_12,
265                d8: pins1.p1_03,
266            },
267            // Core peripherals
268            CBP: cp.CBP,
269            CPUID: cp.CPUID,
270            DCB: cp.DCB,
271            DWT: cp.DWT,
272            FPB: cp.FPB,
273            FPU: cp.FPU,
274            ITM: cp.ITM,
275            MPU: cp.MPU,
276            NVIC: cp.NVIC,
277            SCB: cp.SCB,
278            SYST: cp.SYST,
279            TPIU: cp.TPIU,
280
281            // nRF52 peripherals
282            FICR: p.FICR,
283            UICR: p.UICR,
284            POWER: p.POWER,
285            CLOCK: p.CLOCK,
286            RADIO: p.RADIO,
287
288            UART0: p.UART0,
289            SPIM0: p.SPIM0,
290            SPIS0: p.SPIS0,
291            TWIM0: p.TWIM0,
292            TWIS0: p.TWIS0,
293            SPI0: p.SPI0,
294            TWI0: p.TWI0,
295            SPIM1: p.SPIM1,
296            SPIS1: p.SPIS1,
297            TWIS1: p.TWIS1,
298            SPI1: p.SPI1,
299            TWI1: p.TWI1,
300            NFCT: p.NFCT,
301            GPIOTE: p.GPIOTE,
302            SAADC: p.SAADC,
303            TIMER0: p.TIMER0,
304            TIMER1: p.TIMER1,
305            TIMER2: p.TIMER2,
306            RTC0: p.RTC0,
307            TEMP: p.TEMP,
308            RNG: p.RNG,
309            ECB: p.ECB,
310            CCM: p.CCM,
311            AAR: p.AAR,
312            WDT: p.WDT,
313            RTC1: p.RTC1,
314            QDEC: p.QDEC,
315            COMP: p.COMP,
316            LPCOMP: p.LPCOMP,
317            SWI0: p.SWI0,
318            EGU0: p.EGU0,
319            SWI1: p.SWI1,
320            EGU1: p.EGU1,
321            SWI2: p.SWI2,
322            EGU2: p.EGU2,
323            SWI3: p.SWI3,
324            EGU3: p.EGU3,
325            SWI4: p.SWI4,
326            EGU4: p.EGU4,
327            SWI5: p.SWI5,
328            EGU5: p.EGU5,
329            TIMER3: p.TIMER3,
330            TIMER4: p.TIMER4,
331            PWM0: p.PWM0,
332            PDM: p.PDM,
333            NVMC: p.NVMC,
334            PPI: p.PPI,
335            MWU: p.MWU,
336            PWM1: p.PWM1,
337            PWM2: p.PWM2,
338            RTC2: p.RTC2,
339            I2S: p.I2S,
340        }
341    }
342}
343
344// Maps the pins to the names printed on the device
345pub struct Pins {
346    pub rst: p0::P0_18<Input<Floating>>,
347    pub mode: p0::P0_11<Input<Floating>>,
348    pub a0: p0::P0_03<Input<Floating>>,
349    pub a1: p0::P0_04<Input<Floating>>,
350    pub a2: p0::P0_28<Input<Floating>>,
351    pub a3: p0::P0_29<Input<Floating>>,
352    pub a4: p0::P0_30<Input<Floating>>,
353    pub a5: p0::P0_31<Input<Floating>>,
354    pub sck: p1::P1_15<Input<Floating>>,
355    pub mosi: p1::P1_13<Input<Floating>>,
356    pub miso: p1::P1_14<Input<Floating>>,
357    pub rx: p0::P0_08<Input<Floating>>,
358    pub tx: p0::P0_06<Input<Floating>>,
359    pub d0: p0::P0_26<Input<Floating>>,
360    pub d1: p0::P0_27<Input<Floating>>,
361    pub d2: p1::P1_01<Input<Floating>>,
362    pub d3: p1::P1_02<Input<Floating>>,
363    pub d4: p1::P1_08<Input<Floating>>,
364    pub d5: p1::P1_10<Input<Floating>>,
365    pub d6: p1::P1_11<Input<Floating>>,
366    pub d7: p1::P1_12<Input<Floating>>,
367    pub d8: p1::P1_03<Input<Floating>>,
368}
particle_xenon/lib.rs

particle_xenon/
lib.rs
