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page_table_multiarch/arch/
x86_64.rs

1//! x86 specific page table structures.
2
3use memory_addr::VirtAddr;
4use page_table_entry::x86_64::X64PTE;
5
6use crate::{PageTable64, PageTable64Cursor, PagingMetaData};
7
8/// metadata of x86_64 page tables.
9pub struct X64PagingMetaData;
10
11impl PagingMetaData for X64PagingMetaData {
12    const LEVELS: usize = 4;
13    const PA_MAX_BITS: usize = 52;
14    const VA_MAX_BITS: usize = 48;
15
16    type VirtAddr = VirtAddr;
17
18    #[inline]
19    fn flush_tlb(vaddr: Option<VirtAddr>) {
20        unsafe {
21            if let Some(vaddr) = vaddr {
22                x86::tlb::flush(vaddr.into());
23            } else {
24                x86::tlb::flush_all();
25            }
26        }
27    }
28}
29
30/// x86_64 page table.
31pub type X64PageTable<H> = PageTable64<X64PagingMetaData, X64PTE, H>;
32/// x86_64 page table cursor.
33pub type X64PageTableCursor<'a, H> = PageTable64Cursor<'a, X64PagingMetaData, X64PTE, H>;