Expand description
2D tile-based texture cache simulation.
Models the texture caching subsystem present on GPU hardware — a fixed-size cache organised in 2D tiles. Each cache line holds a rectangular tile of texels. The cache tracks:
- Hit/miss counts per request.
- LRU eviction — the least-recently-used tile is evicted when the cache is full and a new tile must be fetched.
- Prefetch hints — callers can warm the cache for anticipated accesses without incrementing the hit counter.
All structures are CPU-side simulations; no actual GPU memory is allocated.
Structs§
- TexCache
Stats - Aggregate cache performance statistics.
- Texture
Cache - 2D tile-based LRU texture cache.
- TileKey
- Identifies a 2D tile by its tile-grid coordinates.
Enums§
- Cache
Error - Errors returned by texture cache operations.