Expand description
Multi-tile / multi-device dispatch for Intel Level Zero GPUs.
Intel Xe-HPC (Ponte Vecchio) and other large-tile Intel GPUs expose individual compute tiles as Level Zero “sub-devices”. This module discovers those sub-devices and distributes matrix work across them.
§Overview
LevelZeroDevice (root)
├── Tile 0 (sub-device handle)
├── Tile 1
└── Tile N-1When sub-devices are not available (older GPUs, consumer Xe Arc), the
MultiTileDispatcher transparently falls back to single-device dispatch.
Structs§
- Multi
Tile Config - Configuration for the multi-tile dispatcher.
- Multi
Tile Dispatcher - Enumerates Level Zero sub-devices and partitions matrix work across tiles.
- SubDevice
Info - Metadata for a single Level Zero sub-device (compute tile).
- Tile
Work Slice - Work assignment for one tile during a GEMM dispatch.
Enums§
- Work
Distribution - How to partition a matrix operation across multiple compute tiles.