kernel/
kernelvec.rs

1use core::arch::asm;
2
3#[naked]
4#[repr(align(16))]
5#[no_mangle]
6pub unsafe extern "C" fn timervec() -> ! {
7    // start.rs has set up the memory that mscratch points to:
8    // scratch[0,8,16] : register save area.
9    // scratch[24] : address of CLINT's MTIMECMP register.
10    // scratch[32] : desired interval between interrupts.
11
12    asm!(
13        "csrrw a0, mscratch, a0",
14        "sd a1, 0(a0)",
15        "sd a2, 8(a0)",
16        "sd a3, 16(a0)",
17        //
18        "ld a1, 24(a0)",
19        "ld a2, 32(a0)",
20        "ld a3, 0(a1)",
21        "add a3, a3, a2",
22        "sd a3, 0(a1)",
23        //
24        "li a1, 2",
25        "csrw sip, a1",
26        //
27        "ld a3, 16(a0)",
28        "ld a2, 8(a0)",
29        "ld a1, 0(a0)",
30        "csrrw a0, mscratch, a0",
31        "mret",
32        options(noreturn)
33    );
34}