Skip to main content

Module cache

Module cache 

Source
Expand description

Bounded LRU page cache.

Frames are allocated up front at Cache::new and reused for the lifetime of the pager — no heap allocation occurs on the read hot path (power-of-ten Rule 3). The LRU ordering is maintained as a doubly-linked list embedded in the same Vec<Frame> that holds the buffers; the index-typed pointers make every traversal a small bounded integer hop (Rule 2).

This cache is not thread-safe. The pager wraps it in &mut self methods; multi-process locking lands in M6.

Structs§

Cache
Fixed-capacity LRU cache keyed by PageId.
Evicted
Outcome of Cache::insert.