nvml_wrapper/structs/
device.rs

1use crate::bitmasks::device::PowerMizerModes;
2#[cfg(target_os = "windows")]
3use crate::enum_wrappers::device::DriverModel;
4use crate::enum_wrappers::device::OperationMode;
5use crate::enums::device::PowerMizerMode;
6#[cfg(feature = "serde")]
7use serde_derive::{Deserialize, Serialize};
8
9/// Returned from `Device.get_confidential_compute_capabilities()`
10#[derive(Debug, Clone, Eq, PartialEq, Hash)]
11#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
12pub struct ConfidentialComputeCapabilities {
13    /// The CPU capabilities.
14    pub cpu_caps: ConfidentialComputeCpuCapabilities,
15    /// The GPU capabilities.
16    pub gpus_caps: ConfidentialComputeGpuCapabilities,
17}
18
19/// The possible CPU capabilities for confidential compute (either None, AMD SEV or Intel TDX)
20#[derive(Debug, Clone, Eq, PartialEq, Hash)]
21#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
22pub enum ConfidentialComputeCpuCapabilities {
23    /// No CPU capabilities.
24    None,
25    /// AMD SEV confidential compute capabilities.
26    AmdSev,
27    /// Intel TDX confidential compute capabilities.
28    IntelTdx,
29}
30
31/// The possible GPU capabilities for confidential compute (either not capable or capable)
32#[derive(Debug, Clone, Eq, PartialEq, Hash)]
33#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
34pub enum ConfidentialComputeGpuCapabilities {
35    /// Capable.
36    Capable,
37    /// Not capable.
38    NotCapable,
39}
40
41/// Returned from `Device.confidential_compute_gpu_attestation_report_bytes()`
42#[derive(Debug, Clone, Eq, PartialEq, Hash)]
43#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
44pub struct ConfidentialComputeGpuAttestationReport {
45    /// The size of the attestation report.
46    pub attestation_report_size: u32,
47    /// The attestation report, of size
48    /// `ffi::bindings::NVML_CC_GPU_ATTESTATION_REPORT_SIZE` == 8192 bytes.
49    pub attestation_report: Vec<u8>,
50    /// Whether the CEC attestation report is present.
51    pub is_cec_attestation_report_present: bool,
52    /// The size of the CEC attestation report.
53    pub cec_attestation_report_size: u32,
54    /// The CEC attestation report, of size
55    /// `ffi::bindings::NVML_CC_GPU_CEC_ATTESTATION_REPORT_SIZE` == 4096 bytes.
56    pub cec_attestation_report: Vec<u8>,
57}
58
59/// Returned from `Device.confidential_compute_gpu_certificate()`
60#[derive(Debug, Clone, Eq, PartialEq, Hash)]
61#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
62pub struct ConfidentialComputeGpuCertificate {
63    /// The size of the certificate chain.
64    pub cert_chain_size: u32,
65    /// The size of the attestation certificate chain.
66    pub attestation_cert_chain_size: u32,
67    /// The certificate chain, of size
68    /// `ffi::bindings::NVML_GPU_CERT_CHAIN_SIZE` == 4096 bytes.
69    pub cert_chain: Vec<u8>,
70    /// The attestation certificate chain, of size
71    /// `ffi::bindings::NVML_GPU_ATTESTATION_CERT_CHAIN_SIZE` == 5120 bytes.
72    pub attestation_cert_chain: Vec<u8>,
73}
74
75/// Returned from `Device.auto_boosted_clocks_enabled()`
76#[derive(Debug, Clone, Eq, PartialEq, Hash)]
77#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
78pub struct AutoBoostClocksEnabledInfo {
79    /// Current state of auto boosted clocks for the `Device`
80    pub is_enabled: bool,
81    /// Default auto boosted clocks behavior for the `Device`
82    ///
83    /// The GPU will revert to this default when no applications are using the
84    /// GPU.
85    pub is_enabled_default: bool,
86}
87
88/// Returned from `Device.decoder_utilization()` and
89/// `Device.encoder_utilization()`.
90#[derive(Debug, Clone, Eq, PartialEq, Hash)]
91#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
92pub struct UtilizationInfo {
93    pub utilization: u32,
94    /// Sampling period in μs.
95    pub sampling_period: u32,
96}
97
98/// Returned from `Device.driver_model()`
99#[derive(Debug)]
100#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
101#[cfg(target_os = "windows")]
102pub struct DriverModelState {
103    pub current: DriverModel,
104    pub pending: DriverModel,
105}
106
107/// Returned from `Device.is_ecc_enabled()`
108#[derive(Debug, Clone, Eq, PartialEq, Hash)]
109#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
110pub struct EccModeState {
111    pub currently_enabled: bool,
112    pub pending_enabled: bool,
113}
114
115/// Returned from `Device.gpu_operation_mode()`
116#[derive(Debug)]
117#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
118pub struct OperationModeState {
119    pub current: OperationMode,
120    pub pending: OperationMode,
121}
122
123/// Returned from `Device.power_management_limit_constraints()`
124///
125/// Values are in milliwatts.
126#[derive(Debug, Clone, Eq, PartialEq, Hash)]
127#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
128pub struct PowerManagementConstraints {
129    pub min_limit: u32,
130    pub max_limit: u32,
131}
132
133/// Returned from `Device.power_mizer_mode()`.
134#[derive(Debug, Clone, Eq, PartialEq, Hash)]
135#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
136pub struct PowerMizerModeInfo {
137    pub current: PowerMizerMode,
138    pub supported: PowerMizerModes,
139}
140
141/// Returned from `Device.encoder_stats()`
142#[derive(Debug, Clone, Eq, PartialEq, Hash)]
143#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
144pub struct EncoderStats {
145    /// The number of active encoder sessions.
146    pub session_count: u32,
147    /// The trailing average FPS of all active encoder sessions.
148    pub average_fps: u32,
149    /// The encode latency in μs.
150    pub average_latency: u32,
151}
152
153/// Returned from `Device.cuda_compute_capability()`
154#[derive(Debug, Clone, Eq, PartialEq, Hash)]
155#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
156pub struct CudaComputeCapability {
157    pub major: i32,
158    pub minor: i32,
159}
160
161/// Returned from `Device.retired_pages()`
162#[derive(Debug, Clone, Eq, PartialEq, Hash)]
163#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
164pub struct RetiredPage {
165    /// The hardware address of the page that was retired.
166    ///
167    /// Note that this does not match the virtual address used in CUDA but does
168    /// match the address information in XID 63.
169    pub address: u64,
170    /// The retirement timestamp.
171    pub timestamp: u64,
172}
173
174/// Populate this newtype with the constants `nvml_wrapper::sys_exports::field_id::*`.
175///
176/// Used in `FieldValue` and `Device.field_values_for()`.
177#[derive(Debug, Clone, Eq, PartialEq, Hash)]
178#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
179pub struct FieldId(pub u32);
180
181/// Returned from `Device.mig_mode()`
182#[derive(Debug, Clone, Eq, PartialEq, Hash)]
183#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
184pub struct MigMode {
185    /// Whether MIG mode is enabled/disabled.
186    pub current: u32,
187    /// Mode set after reboot.
188    pub pending: u32,
189}
190
191/// Returned from `Device.gsp_firmware_mode()`
192#[derive(Debug, Clone, Eq, PartialEq, Hash)]
193#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
194pub struct GspFirmwareMode {
195    pub enabled: bool,
196    pub default: bool,
197}
nvml_wrapper/structs/device.rs

nvml_wrapper/structs/
device.rs
