1use status::NvAPI_Status;
2use handles::NvPhysicalGpuHandle;
3
4nvenum! {
5 pub enum NV_THERMAL_TARGET / ThermalTarget {
7 NVAPI_THERMAL_TARGET_NONE / None = 0,
8 NVAPI_THERMAL_TARGET_GPU / Gpu = 1,
10 NVAPI_THERMAL_TARGET_MEMORY / Memory = 2,
12 NVAPI_THERMAL_TARGET_POWER_SUPPLY / PowerSupply = 4,
14 NVAPI_THERMAL_TARGET_BOARD / Board = 8,
16 NVAPI_THERMAL_TARGET_VCD_BOARD / VcdBoard = 9,
18 NVAPI_THERMAL_TARGET_VCD_INLET / VcdInlet = 10,
20 NVAPI_THERMAL_TARGET_VCD_OUTLET / VcdOutlet = 11,
22 NVAPI_THERMAL_TARGET_ALL / All = 15,
23 NVAPI_THERMAL_TARGET_UNKNOWN / Unknown = -1,
24 }
25}
26
27nvenum_display! {
28 ThermalTarget => {
29 Gpu = "Core",
30 Memory = "Memory",
31 PowerSupply = "VRM",
32 VcdBoard = "VCD Board",
33 VcdInlet = "VCD Inlet",
34 VcdOutlet = "VCD Outlet",
35 _ = _,
36 }
37}
38
39nvenum! {
40 pub enum NV_THERMAL_CONTROLLER / ThermalController {
42 NVAPI_THERMAL_CONTROLLER_NONE / None = 0,
43 NVAPI_THERMAL_CONTROLLER_GPU_INTERNAL / GpuInternal = 1,
44 NVAPI_THERMAL_CONTROLLER_ADM1032 / ADM1032 = 2,
45 NVAPI_THERMAL_CONTROLLER_MAX6649 / MAX6649 = 3,
46 NVAPI_THERMAL_CONTROLLER_MAX1617 / MAX1617 = 4,
47 NVAPI_THERMAL_CONTROLLER_LM99 / LM99 = 5,
48 NVAPI_THERMAL_CONTROLLER_LM89 / LM89 = 6,
49 NVAPI_THERMAL_CONTROLLER_LM64 / LM64 = 7,
50 NVAPI_THERMAL_CONTROLLER_ADT7473 / ADT7473 = 8,
51 NVAPI_THERMAL_CONTROLLER_SBMAX6649 / SBMAX6649 = 9,
52 NVAPI_THERMAL_CONTROLLER_VBIOSEVT / VBIOSEVT = 10,
53 NVAPI_THERMAL_CONTROLLER_OS / OS = 11,
54 NVAPI_THERMAL_CONTROLLER_UNKNOWN / Unknown = -1,
55 }
56}
57
58nvenum_display! {
59 ThermalController => {
60 GpuInternal = "Internal",
61 _ = _,
62 }
63}
64
65pub const NVAPI_MAX_THERMAL_SENSORS_PER_GPU: usize = 3;
66
67nvstruct! {
68 pub struct NV_GPU_THERMAL_SETTINGS_V1 {
70 pub version: u32,
72 pub count: u32,
74 pub sensor: [NV_GPU_THERMAL_SETTINGS_SENSOR; NVAPI_MAX_THERMAL_SENSORS_PER_GPU],
75 }
76}
77
78nvstruct! {
79 pub struct NV_GPU_THERMAL_SETTINGS_SENSOR {
81 pub controller: NV_THERMAL_CONTROLLER,
83 pub defaultMinTemp: i32,
85 pub defaultMaxTemp: i32,
87 pub currentTemp: i32,
89 pub target: NV_THERMAL_TARGET,
91 }
92}
93
94pub type NV_GPU_THERMAL_SETTINGS_V2 = NV_GPU_THERMAL_SETTINGS_V1; pub type NV_GPU_THERMAL_SETTINGS = NV_GPU_THERMAL_SETTINGS_V2;
96
97const NV_GPU_THERMAL_SETTINGS_V1_SIZE: usize = 4 * 2 + (4 * 5) * NVAPI_MAX_THERMAL_SENSORS_PER_GPU;
98nvversion! { NV_GPU_THERMAL_SETTINGS_VER_1(NV_GPU_THERMAL_SETTINGS_V1 = NV_GPU_THERMAL_SETTINGS_V1_SIZE, 1) }
99nvversion! { NV_GPU_THERMAL_SETTINGS_VER_2(NV_GPU_THERMAL_SETTINGS_V2 = NV_GPU_THERMAL_SETTINGS_V1_SIZE, 2) }
100nvversion! { NV_GPU_THERMAL_SETTINGS_VER = NV_GPU_THERMAL_SETTINGS_VER_2 }
101
102nvapi! {
103 pub type GPU_GetThermalSettingsFn = extern "C" fn(hPhysicalGPU: NvPhysicalGpuHandle, sensorIndex: u32, pThermalSettings: *mut NV_GPU_THERMAL_SETTINGS) -> NvAPI_Status;
104
105 pub unsafe fn NvAPI_GPU_GetThermalSettings;
111}
112
113pub mod private {
115 use status::NvAPI_Status;
116 use handles::NvPhysicalGpuHandle;
117
118 pub const NVAPI_MAX_THERMAL_INFO_ENTRIES: usize = 4;
119
120 nvstruct! {
121 pub struct NV_GPU_THERMAL_INFO_ENTRY {
122 pub controller: super::NV_THERMAL_CONTROLLER,
123 pub unknown: u32,
124 pub minTemp: i32,
125 pub defaultTemp: i32,
126 pub maxTemp: i32,
127 pub defaultFlags: u32,
128 }
129 }
130 const NV_GPU_THERMAL_INFO_ENTRY_SIZE: usize = 4 * 6;
131
132 nvstruct! {
133 pub struct NV_GPU_THERMAL_INFO_V2 {
134 pub version: u32,
135 pub count: u8,
136 pub flags: u8,
137 pub padding: [u8; 2],
138 pub entries: [NV_GPU_THERMAL_INFO_ENTRY; NVAPI_MAX_THERMAL_INFO_ENTRIES],
139 }
140 }
141 const NV_GPU_THERMAL_INFO_V2_SIZE: usize = 4 * 2 + NV_GPU_THERMAL_INFO_ENTRY_SIZE * NVAPI_MAX_THERMAL_INFO_ENTRIES;
142
143 pub type NV_GPU_THERMAL_INFO = NV_GPU_THERMAL_INFO_V2;
144
145 nvversion! { NV_GPU_THERMAL_INFO_VER_2(NV_GPU_THERMAL_INFO_V2 = NV_GPU_THERMAL_INFO_V2_SIZE, 2) }
146 nvversion! { NV_GPU_THERMAL_INFO_VER = NV_GPU_THERMAL_INFO_VER_2 }
147
148 nvapi! {
149 pub unsafe fn NvAPI_GPU_ClientThermalPoliciesGetInfo(hPhysicalGPU: NvPhysicalGpuHandle, pThermalInfo: *mut NV_GPU_THERMAL_INFO) -> NvAPI_Status;
150 }
151
152 pub const NVAPI_MAX_THERMAL_LIMIT_ENTRIES: usize = 4;
153
154 nvstruct! {
155 pub struct NV_GPU_THERMAL_LIMIT_ENTRY {
156 pub controller: super::NV_THERMAL_CONTROLLER,
157 pub value: u32,
158 pub flags: u32,
159 }
160 }
161 const NV_GPU_THERMAL_LIMIT_ENTRY_SIZE: usize = 4 * 3;
162
163 nvstruct! {
164 pub struct NV_GPU_THERMAL_LIMIT_V2 {
165 pub version: u32,
166 pub flags: u32,
167 pub entries: [NV_GPU_THERMAL_LIMIT_ENTRY; NVAPI_MAX_THERMAL_LIMIT_ENTRIES],
168 }
169 }
170 const NV_GPU_THERMAL_LIMIT_V2_SIZE: usize = 4 * 2 + NV_GPU_THERMAL_LIMIT_ENTRY_SIZE * NVAPI_MAX_THERMAL_LIMIT_ENTRIES;
171
172 pub type NV_GPU_THERMAL_LIMIT = NV_GPU_THERMAL_LIMIT_V2;
173
174 nvversion! { NV_GPU_THERMAL_LIMIT_VER_2(NV_GPU_THERMAL_LIMIT_V2 = NV_GPU_THERMAL_LIMIT_V2_SIZE, 2) }
175 nvversion! { NV_GPU_THERMAL_LIMIT_VER = NV_GPU_THERMAL_LIMIT_VER_2 }
176
177 nvapi! {
178 pub unsafe fn NvAPI_GPU_ClientThermalPoliciesGetLimit(hPhysicalGPU: NvPhysicalGpuHandle, pThermalLimit: *mut NV_GPU_THERMAL_LIMIT) -> NvAPI_Status;
179 }
180
181 nvapi! {
182 pub unsafe fn NvAPI_GPU_ClientThermalPoliciesSetLimit(hPhysicalGPU: NvPhysicalGpuHandle, pThermalLimit: *const NV_GPU_THERMAL_LIMIT) -> NvAPI_Status;
183 }
184}