1pub mod private {
3 use status::NvAPI_Status;
4 use handles::NvPhysicalGpuHandle;
5 use debug_array::Array;
6
7 nvstruct! {
8 pub struct NV_VOLTAGE_STATUS_V1 {
9 pub version: u32,
10 pub flags: u32,
11 pub zero: [u32; 8],
12 pub value_uV: u32,
13 pub unknown: [u32; 8],
14 }
15 }
16
17 nvversion! { NV_VOLTAGE_STATUS_VER_1(NV_VOLTAGE_STATUS_V1 = 4 * (2 + 8 + 1 + 8), 1) }
18 nvversion! { NV_VOLTAGE_STATUS_VER = NV_VOLTAGE_STATUS_VER_1 }
19
20 pub type NV_VOLTAGE_STATUS = NV_VOLTAGE_STATUS_V1;
21
22 nvapi! {
23 pub unsafe fn NvAPI_GPU_GetCurrentVoltage(hPhysicalGPU: NvPhysicalGpuHandle, pVoltageStatus: *mut NV_VOLTAGE_STATUS) -> NvAPI_Status;
25 }
26
27 nvstruct! {
28 pub struct NV_VOLTAGE_BOOST_PERCENT_V1 {
29 pub version: u32,
30 pub percent: u32, pub unknown: [u32; 8],
32 }
33 }
34
35 nvversion! { NV_VOLTAGE_BOOST_PERCENT_VER_1(NV_VOLTAGE_BOOST_PERCENT_V1 = 4 * (2 + 8), 1) }
36 nvversion! { NV_VOLTAGE_BOOST_PERCENT_VER = NV_VOLTAGE_BOOST_PERCENT_VER_1 }
37
38 pub type NV_VOLTAGE_BOOST_PERCENT = NV_VOLTAGE_BOOST_PERCENT_V1;
39
40 nvapi! {
41 pub unsafe fn NvAPI_GPU_GetCoreVoltageBoostPercent(hPhysicalGPU: NvPhysicalGpuHandle, pVoltboostPercent: *mut NV_VOLTAGE_BOOST_PERCENT) -> NvAPI_Status;
43 }
44
45 nvapi! {
46 pub unsafe fn NvAPI_GPU_SetCoreVoltageBoostPercent(hPhysicalGPU: NvPhysicalGpuHandle, pVoltboostPercent: *const NV_VOLTAGE_BOOST_PERCENT) -> NvAPI_Status;
48 }
49
50 nvstruct! {
51 pub struct NV_VFP_CURVE_GPU_ENTRY {
52 pub a: u32, pub freq_kHz: u32,
54 pub voltage_uV: u32,
55 pub d: u32,
56 pub e: u32,
57 pub f: u32,
58 pub g: u32,
59 }
60 }
61
62 pub type NV_VFP_CURVE_MEM_ENTRY = NV_VFP_CURVE_GPU_ENTRY;
64 debug_array_impl! { [NV_VFP_CURVE_GPU_ENTRY; 80] }
77 debug_array_impl! { [u32; 1064] }
78
79 nvstruct! {
80 pub struct NV_VFP_CURVE_V1 {
81 pub version: u32,
82 pub mask: [u32; 4], pub unknown: [u32; 12],
84 pub gpuEntries: Array<[NV_VFP_CURVE_GPU_ENTRY; 80]>,
85 pub memEntries: [NV_VFP_CURVE_MEM_ENTRY; 23],
86 pub unknown2: Array<[u32; 1064]>,
87 }
88 }
89
90 nvversion! { NV_VFP_CURVE_VER_1(NV_VFP_CURVE_V1 = 0x1c28, 1) }
91 nvversion! { NV_VFP_CURVE_VER = NV_VFP_CURVE_VER_1 }
92
93 pub type NV_VFP_CURVE = NV_VFP_CURVE_V1;
94
95 nvapi! {
96 pub unsafe fn NvAPI_GPU_GetVFPCurve(hPhysicalGPU: NvPhysicalGpuHandle, pVfpCurve: *mut NV_VFP_CURVE) -> NvAPI_Status;
98 }
99
100 nvstruct! {
101 pub struct NV_GPU_POWER_INFO_ENTRY {
102 pub pstate: u32, pub b: u32,
104 pub c: u32,
105 pub min_power: u32,
106 pub e: u32,
107 pub f: u32,
108 pub def_power: u32,
109 pub h: u32,
110 pub i: u32,
111 pub max_power: u32,
112 pub k: u32, }
114 }
115
116 nvstruct! {
117 pub struct NV_GPU_POWER_INFO_V1 {
118 pub version: u32,
119 pub valid: u8,
120 pub count: u8,
121 pub padding: [u8; 2],
122 pub entries: [NV_GPU_POWER_INFO_ENTRY; 4],
123 }
124 }
125
126 pub type NV_GPU_POWER_INFO = NV_GPU_POWER_INFO_V1;
127
128 nvversion! { NV_GPU_POWER_INFO_VER_1(NV_GPU_POWER_INFO_V1 = 4 * 2 + 4 * (4 * 11), 1) }
129 nvversion! { NV_GPU_POWER_INFO_VER = NV_GPU_POWER_INFO_VER_1 }
130
131 nvapi! {
132 pub unsafe fn NvAPI_GPU_ClientPowerPoliciesGetInfo(hPhysicalGPU: NvPhysicalGpuHandle, pPowerInfo: *mut NV_GPU_POWER_INFO) -> NvAPI_Status;
133 }
134
135 nvstruct! {
136 pub struct NV_GPU_POWER_STATUS_ENTRY {
137 pub a: u32,
138 pub b: u32,
139 pub power: u32,
140 pub d: u32,
141 }
142 }
143
144 nvstruct! {
145 pub struct NV_GPU_POWER_STATUS_V1 {
146 pub version: u32,
147 pub count: u32,
148 pub entries: [NV_GPU_POWER_STATUS_ENTRY; 4],
149 }
150 }
151
152 pub type NV_GPU_POWER_STATUS = NV_GPU_POWER_STATUS_V1;
153
154 nvversion! { NV_GPU_POWER_STATUS_VER_1(NV_GPU_POWER_STATUS_V1 = 4 * 2 + 4 * (4 * 4), 1) }
155 nvversion! { NV_GPU_POWER_STATUS_VER = NV_GPU_POWER_STATUS_VER_1 }
156
157 nvapi! {
158 pub unsafe fn NvAPI_GPU_ClientPowerPoliciesGetStatus(hPhysicalGPU: NvPhysicalGpuHandle, pPowerStatus: *mut NV_GPU_POWER_STATUS) -> NvAPI_Status;
159 }
160
161 nvapi! {
162 pub unsafe fn NvAPI_GPU_ClientPowerPoliciesSetStatus(hPhysicalGPU: NvPhysicalGpuHandle, pPowerStatus: *const NV_GPU_POWER_STATUS) -> NvAPI_Status;
163 }
164
165 nvstruct! {
166 pub struct NV_GPU_POWER_TOPO_ENTRY {
167 pub a: u32,
168 pub b: u32,
169 pub power: u32,
170 pub d: u32,
171 }
172 }
173
174 nvstruct! {
175 pub struct NV_GPU_POWER_TOPO_V1 {
176 pub version: u32,
177 pub count: u32,
178 pub entries: [NV_GPU_POWER_TOPO_ENTRY; 4],
179 }
180 }
181
182 pub type NV_GPU_POWER_TOPO = NV_GPU_POWER_TOPO_V1;
183
184 nvversion! { NV_GPU_POWER_TOPO_VER_1(NV_GPU_POWER_TOPO_V1 = 4 * 2 + 4 * (4 * 4), 1) }
185 nvversion! { NV_GPU_POWER_TOPO_VER = NV_GPU_POWER_TOPO_VER_1 }
186
187 nvapi! {
188 pub unsafe fn NvAPI_GPU_ClientPowerTopologyGetStatus(hPhysicalGPU: NvPhysicalGpuHandle, pPowerTopo: *mut NV_GPU_POWER_TOPO) -> NvAPI_Status;
189 }
190
191 nvbits! {
192 pub enum NV_GPU_PERF_FLAGS / PerfFlags {
193 NV_GPU_PERF_FLAGS_POWER_LIMIT / POWER_LIMIT = 1,
194 NV_GPU_PERF_FLAGS_THERMAL_LIMIT / THERMAL_LIMIT = 2,
195 NV_GPU_PERF_FLAGS_VOLTAGE_REL_LIMIT / VOLTAGE_REL_LIMIT = 4,
197 NV_GPU_PERF_FLAGS_VOLTAGE_OP_LIMIT / VOLTAGE_OP_LIMIT = 8,
199 NV_GPU_PERF_FLAGS_NO_LOAD_LIMIT / NO_LOAD_LIMIT = 16,
201 NV_GPU_PERF_FLAGS_UNKNOWN_32 / UNKNOWN_32 = 32,
203 }
204 }
205
206 nvenum_display! {
207 PerfFlags => {
208 POWER_LIMIT = "Power",
209 THERMAL_LIMIT = "Temperature",
210 VOLTAGE_REL_LIMIT = "Reliability Voltage",
211 VOLTAGE_OP_LIMIT = "Operating Voltage",
212 NO_LOAD_LIMIT = "No Load",
213 UNKNOWN_32 = "Unknown32",
214 _ = _,
215 }
216 }
217
218 nvstruct! {
219 pub struct NV_GPU_PERF_INFO_V1 {
220 pub version: u32,
221 pub maxUnknown: u32,
222 pub limitSupport: NV_GPU_PERF_FLAGS,
223 pub padding: [u32; 16],
224 }
225 }
226
227 pub type NV_GPU_PERF_INFO = NV_GPU_PERF_INFO_V1;
228
229 nvversion! { NV_GPU_PERF_INFO_VER_1(NV_GPU_PERF_INFO_V1 = 76, 1) }
230 nvversion! { NV_GPU_PERF_INFO_VER = NV_GPU_PERF_INFO_VER_1 }
231
232 nvapi! {
233 pub unsafe fn NvAPI_GPU_PerfPoliciesGetInfo(hPhysicalGPU: NvPhysicalGpuHandle, pPerfInfo: *mut NV_GPU_PERF_INFO) -> NvAPI_Status;
234 }
235
236 debug_array_impl! { [u32; 326] }
237
238 nvstruct! {
239 pub struct NV_GPU_PERF_STATUS_V1 {
240 pub version: u32,
241 pub flags: u32,
242 pub timer: u64,
244 pub limits: NV_GPU_PERF_FLAGS,
250 pub zero0: u32,
251 pub unknown: u32,
255 pub zero1: u32,
256 pub timers: [u64; 3],
258 pub padding: Array<[u32; 326]>,
259 }
260 }
261
262 pub type NV_GPU_PERF_STATUS = NV_GPU_PERF_STATUS_V1;
263
264 nvversion! { NV_GPU_PERF_STATUS_VER_1(NV_GPU_PERF_STATUS_V1 = 0x550, 1) }
265 nvversion! { NV_GPU_PERF_STATUS_VER = NV_GPU_PERF_STATUS_VER_1 }
266
267 nvapi! {
268 pub unsafe fn NvAPI_GPU_PerfPoliciesGetStatus(hPhysicalGPU: NvPhysicalGpuHandle, pPerfStatus: *mut NV_GPU_PERF_STATUS) -> NvAPI_Status;
269 }
270
271 nvstruct! {
272 pub struct NV_VOLT_STATUS_V1 {
273 pub version: u32,
274 pub flags: u32,
275 pub count: u32,
277 pub unknown: u32,
278 pub value_uV: u32,
279 pub buf1: [u32; 30],
280 }
281 }
282
283 pub type NV_VOLT_STATUS = NV_VOLT_STATUS_V1;
284
285 nvversion! { NV_VOLT_STATUS_VER_1(NV_VOLT_STATUS_V1 = 140, 1) }
286 nvversion! { NV_VOLT_STATUS_VER = NV_VOLT_STATUS_VER_1 }
287
288 nvapi! {
289 pub unsafe fn NvAPI_GPU_GetVoltageDomainsStatus(hPhysicalGPU: NvPhysicalGpuHandle, pVoltStatus: *mut NV_VOLT_STATUS) -> NvAPI_Status;
291 }
292
293 nvapi! {
294 pub unsafe fn NvAPI_GPU_GetVoltageStep(hPhysicalGPU: NvPhysicalGpuHandle, pVoltStep: *mut NV_VOLT_STATUS) -> NvAPI_Status;
296 }
297
298 nvstruct! {
299 pub struct NV_VOLT_TABLE_ENTRY {
300 pub voltage_uV: u32,
301 pub unknown: u32,
302 }
303 }
304
305 debug_array_impl! { [NV_VOLT_TABLE_ENTRY; 128] }
306 debug_array_impl! { [u32; 3888] }
307
308 nvstruct! {
309 pub struct NV_VOLT_TABLE_V1 {
310 pub version: u32,
311 pub flags: u32,
312 pub filled: u32,
314 pub entries: Array<[NV_VOLT_TABLE_ENTRY; 128]>,
315 pub buf1: Array<[u32; 3888]>,
317 }
318 }
319
320 pub type NV_VOLT_TABLE = NV_VOLT_TABLE_V1;
321
322 nvversion! { NV_VOLT_TABLE_VER_1(NV_VOLT_TABLE_V1 = 0x40cc, 1) }
323 nvversion! { NV_VOLT_TABLE_VER = NV_VOLT_TABLE_VER_1 }
324
325 nvapi! {
326 pub unsafe fn NvAPI_GPU_GetVoltages(hPhysicalGPU: NvPhysicalGpuHandle, pVolts: *mut NV_VOLT_TABLE) -> NvAPI_Status;
328 }
329}