Expand description
Cache-aware memory optimization and data layout strategies
This module provides cache-optimized data structures and algorithms that are aware of modern CPU cache hierarchies and memory access patterns to maximize performance.
Modules§
- cache_
constants - Cache line size constants for different architectures
Structs§
- Cache
Blocked Matrix - Cache-blocked matrix operations for improved cache performance
- Cache
Config - Cache-aware memory layout configuration
- Cache
Metrics - Cache performance metrics for monitoring and tuning
- Cache
Optimization Params - Cache optimization parameters for algorithms
- Cache
Optimization Recommendation - Cache optimization recommendation
- Cache
Optimized Allocator - Cache-optimized memory allocator that aligns data to cache boundaries
- Cache
Optimized Builder - Cache-friendly data structure builder
Enums§
- Access
Type - Memory access type for cache analysis
- Cache
Level - Cache level enumeration for optimization targeting
- Cache
Optimization Type - Types of cache optimizations