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Module model

Module model 

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The static peripheral model: how stm32.toml keys map to database signals, which pins a peripheral requires, and which bus clock domain feeds it.

This is intentionally a small hand-maintained table rather than something derived from the pack data: the pack knows pin↔signal wiring, but not the ergonomic config-key names (tx, mosi, sda) nor the required-vs-optional distinction, which are Nucleus product decisions.

Structs§

Role
One configurable pin on a peripheral: the stm32.toml key, the database signal name it resolves to, and whether the peripheral is unusable without it.

Enums§

Bus
A device bus clock domain. Phase 2 does only “is this bus enabled?” checking (per the scope rules — no full clock-tree solving).

Functions§

peripheral_bus
The bus clock domain that feeds peripheral on the STM32F446RE, or None if unknown (in which case the clock check is skipped — never a false error).
peripheral_name
The database peripheral name for a config instance name, e.g. "usart2""USART2". Nucleus simply upper-cases the instance name; the database uses the same convention as ST’s pin data.
roles_for
The pin roles for the peripheral instance named instance (e.g. "usart2"), or None if the kind is not modelled. The match is on the alphabetic prefix, so usart2 and usart3 share one role table.