[−][src]Struct nucleo_l011k4_bsp::Pins

pub struct Pins {
    pub d1: PA9<Analog>,
    pub d0: PA10<Analog>,
    pub d2: PA12<Analog>,
    pub d3: PB0<Analog>,
    pub d4: PB7<Analog>,
    pub d5: PB6<Analog>,
    pub d6: PB1<Analog>,
    pub d7: PC14<Analog>,
    pub d8: PC15<Analog>,
    pub d9: PA8<Analog>,
    pub d10: PA11<Analog>,
    pub d11: PB5<Analog>,
    pub d12: PB4<Analog>,
    pub d13: PB3<Analog>,
    pub a0: PA0<Analog>,
    pub a1: PA1<Analog>,
    pub a2: PA3<Analog>,
    pub a3: PA4<Analog>,
    pub a4: PA5<Analog>,
    pub a5: PA6<Analog>,
    pub a6: PA7<Analog>,
    pub a7: PA2<Analog>,
}

A representation of connectors CN3 and CN4

Fields

d1: PA9<Analog>

D1 - MCO, I2C1_SCL, USART2_TX, TIM22_CH1

d0: PA10<Analog>

D0 - I2C1_SDA, USART2_RX, TIM22_CH2

d2: PA12<Analog>

D2 - SPI1_MOSI, EVENTOUT, USART2_RTS/ USART2_DE, COMP2_OUT

d3: PB0<Analog>

D3 - EVENTOUT, SPI1_MISO, USART2_RTS/ USART2_DE, TIM2_CH3

d4: PB7<Analog>

D4 - USART2_RX, I2C1_SDA, LPTIM1_IN2

d5: PB6<Analog>

D5 - USART2_TX, I2C1_SCL, LPTIM1_ETR, TIM21_CH1

d6: PB1<Analog>

D6 - USART2_CK, SPI1_MOSI, LPUART1_RTS/ LPUART1_DE, TIM2_CH4

d7: PC14<Analog>

D7 - OSC32_IN

d8: PC15<Analog>

D8 - OSC32_OUT

d9: PA8<Analog>

D9 - MCO, LPTIM1_IN1, EVENTOUT, USART2_CK, TIM2_CH1

d10: PA11<Analog>

D10 - MCO, LPTIM1_IN1, EVENTOUT, USART2_CK, TIM2_CH1

d11: PB5<Analog>

D11 - SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM22_CH2

d12: PB4<Analog>

D12 - SPI1_MISO, EVENTOUT, TIM22_CH1

d13: PB3<Analog>

D13 - SPI1_SCK, TIM2_CH2, EVENTOUT

a0: PA0<Analog>

A0 - LPTIM1_IN1, TIM2_CH1, USART2_CTS, TIM2_ETR, COMP1_OUT

a1: PA1<Analog>

A1 - EVENTOUT, LPTIM1_IN2, TIM2_CH2, I2C1_SMBA, USART2_RTS/ USART2_DE, TIM21_ETR

a2: PA3<Analog>

A2 - TIM21_CH2, TIM2_CH4, USART2_RX, LPUART1_RX

a3: PA4<Analog>

A3 - SPI1_NSS, LPTIM1_IN1, USART2_CK, TIM22_ETR

a4: PA5<Analog>

A4 - SPI1_SCK, LPTIM1_IN2, TIM2_ETR, TIM2_CH1

a5: PA6<Analog>

A5 - SPI1_MISO, LPTIM1_ETR, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT

a6: PA7<Analog>

A6 - SPI1_MOSI, LPTIM1_OUT, USART2_CTS, TIM22_CH2, EVENTOUT, COMP2_OUT

a7: PA2<Analog>

A7 - TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT

Auto Trait Implementations

impl Send for Pins

impl Sync for Pins

impl Unpin for Pins

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.