Struct nucleo_h7xx::pac::otg1_hs_host::RegisterBlock[]

#[repr(C)]pub struct RegisterBlock {
    pub hcfg: Reg<u32, _HCFG>,
    pub hfir: Reg<u32, _HFIR>,
    pub hfnum: Reg<u32, _HFNUM>,
    pub hptxsts: Reg<u32, _HPTXSTS>,
    pub haint: Reg<u32, _HAINT>,
    pub haintmsk: Reg<u32, _HAINTMSK>,
    pub hprt: Reg<u32, _HPRT>,
    pub hcchar0: Reg<u32, _HCCHAR0>,
    pub hcsplt0: Reg<u32, _HCSPLT0>,
    pub hcint0: Reg<u32, _HCINT0>,
    pub hcintmsk0: Reg<u32, _HCINTMSK0>,
    pub hctsiz0: Reg<u32, _HCTSIZ0>,
    pub hcdma0: Reg<u32, _HCDMA0>,
    pub hcchar1: Reg<u32, _HCCHAR1>,
    pub hcsplt1: Reg<u32, _HCSPLT1>,
    pub hcint1: Reg<u32, _HCINT1>,
    pub hcintmsk1: Reg<u32, _HCINTMSK1>,
    pub hctsiz1: Reg<u32, _HCTSIZ1>,
    pub hcdma1: Reg<u32, _HCDMA1>,
    pub hcchar2: Reg<u32, _HCCHAR2>,
    pub hcsplt2: Reg<u32, _HCSPLT2>,
    pub hcint2: Reg<u32, _HCINT2>,
    pub hcintmsk2: Reg<u32, _HCINTMSK2>,
    pub hctsiz2: Reg<u32, _HCTSIZ2>,
    pub hcdma2: Reg<u32, _HCDMA2>,
    pub hcchar3: Reg<u32, _HCCHAR3>,
    pub hcsplt3: Reg<u32, _HCSPLT3>,
    pub hcint3: Reg<u32, _HCINT3>,
    pub hcintmsk3: Reg<u32, _HCINTMSK3>,
    pub hctsiz3: Reg<u32, _HCTSIZ3>,
    pub hcdma3: Reg<u32, _HCDMA3>,
    pub hcchar4: Reg<u32, _HCCHAR4>,
    pub hcsplt4: Reg<u32, _HCSPLT4>,
    pub hcint4: Reg<u32, _HCINT4>,
    pub hcintmsk4: Reg<u32, _HCINTMSK4>,
    pub hctsiz4: Reg<u32, _HCTSIZ4>,
    pub hcdma4: Reg<u32, _HCDMA4>,
    pub hcchar5: Reg<u32, _HCCHAR5>,
    pub hcsplt5: Reg<u32, _HCSPLT5>,
    pub hcint5: Reg<u32, _HCINT5>,
    pub hcintmsk5: Reg<u32, _HCINTMSK5>,
    pub hctsiz5: Reg<u32, _HCTSIZ5>,
    pub hcdma5: Reg<u32, _HCDMA5>,
    pub hcchar6: Reg<u32, _HCCHAR6>,
    pub hcsplt6: Reg<u32, _HCSPLT6>,
    pub hcint6: Reg<u32, _HCINT6>,
    pub hcintmsk6: Reg<u32, _HCINTMSK6>,
    pub hctsiz6: Reg<u32, _HCTSIZ6>,
    pub hcdma6: Reg<u32, _HCDMA6>,
    pub hcchar7: Reg<u32, _HCCHAR7>,
    pub hcsplt7: Reg<u32, _HCSPLT7>,
    pub hcint7: Reg<u32, _HCINT7>,
    pub hcintmsk7: Reg<u32, _HCINTMSK7>,
    pub hctsiz7: Reg<u32, _HCTSIZ7>,
    pub hcdma7: Reg<u32, _HCDMA7>,
    pub hcchar8: Reg<u32, _HCCHAR8>,
    pub hcsplt8: Reg<u32, _HCSPLT8>,
    pub hcint8: Reg<u32, _HCINT8>,
    pub hcintmsk8: Reg<u32, _HCINTMSK8>,
    pub hctsiz8: Reg<u32, _HCTSIZ8>,
    pub hcdma8: Reg<u32, _HCDMA8>,
    pub hcchar9: Reg<u32, _HCCHAR9>,
    pub hcsplt9: Reg<u32, _HCSPLT9>,
    pub hcint9: Reg<u32, _HCINT9>,
    pub hcintmsk9: Reg<u32, _HCINTMSK9>,
    pub hctsiz9: Reg<u32, _HCTSIZ9>,
    pub hcdma9: Reg<u32, _HCDMA9>,
    pub hcchar10: Reg<u32, _HCCHAR10>,
    pub hcsplt10: Reg<u32, _HCSPLT10>,
    pub hcint10: Reg<u32, _HCINT10>,
    pub hcintmsk10: Reg<u32, _HCINTMSK10>,
    pub hctsiz10: Reg<u32, _HCTSIZ10>,
    pub hcdma10: Reg<u32, _HCDMA10>,
    pub hcchar11: Reg<u32, _HCCHAR11>,
    pub hcsplt11: Reg<u32, _HCSPLT11>,
    pub hcint11: Reg<u32, _HCINT11>,
    pub hcintmsk11: Reg<u32, _HCINTMSK11>,
    pub hctsiz11: Reg<u32, _HCTSIZ11>,
    pub hcdma11: Reg<u32, _HCDMA11>,
    pub hcchar12: Reg<u32, _HCCHAR12>,
    pub hcsplt12: Reg<u32, _HCSPLT12>,
    pub hcint12: Reg<u32, _HCINT12>,
    pub hcintmsk12: Reg<u32, _HCINTMSK12>,
    pub hctsiz12: Reg<u32, _HCTSIZ12>,
    pub hcdma12: Reg<u32, _HCDMA12>,
    pub hcchar13: Reg<u32, _HCCHAR13>,
    pub hcsplt13: Reg<u32, _HCSPLT13>,
    pub hcint13: Reg<u32, _HCINT13>,
    pub hcintmsk13: Reg<u32, _HCINTMSK13>,
    pub hctsiz13: Reg<u32, _HCTSIZ13>,
    pub hcdma13: Reg<u32, _HCDMA13>,
    pub hcchar14: Reg<u32, _HCCHAR14>,
    pub hcsplt14: Reg<u32, _HCSPLT14>,
    pub hcint14: Reg<u32, _HCINT14>,
    pub hcintmsk14: Reg<u32, _HCINTMSK14>,
    pub hctsiz14: Reg<u32, _HCTSIZ14>,
    pub hcdma14: Reg<u32, _HCDMA14>,
    pub hcchar15: Reg<u32, _HCCHAR15>,
    pub hcsplt15: Reg<u32, _HCSPLT15>,
    pub hcint15: Reg<u32, _HCINT15>,
    pub hcintmsk15: Reg<u32, _HCINTMSK15>,
    pub hctsiz15: Reg<u32, _HCTSIZ15>,
    pub hcdma15: Reg<u32, _HCDMA15>,
    // some fields omitted
}

Register block

Fields

hcfg: Reg<u32, _HCFG>

0x00 - OTG_HS host configuration register

hfir: Reg<u32, _HFIR>

0x04 - OTG_HS Host frame interval register

hfnum: Reg<u32, _HFNUM>

0x08 - OTG_HS host frame number/frame time remaining register

hptxsts: Reg<u32, _HPTXSTS>

0x10 - OTG_HS_Host periodic transmit FIFO/queue status register

haint: Reg<u32, _HAINT>

0x14 - OTG_HS Host all channels interrupt register

haintmsk: Reg<u32, _HAINTMSK>

0x18 - OTG_HS host all channels interrupt mask register

hprt: Reg<u32, _HPRT>

0x40 - OTG_HS host port control and status register

hcchar0: Reg<u32, _HCCHAR0>

0x100 - OTG_HS host channel-0 characteristics register

hcsplt0: Reg<u32, _HCSPLT0>

0x104 - OTG_HS host channel-0 split control register

hcint0: Reg<u32, _HCINT0>

0x108 - OTG_HS host channel-11 interrupt register

hcintmsk0: Reg<u32, _HCINTMSK0>

0x10c - OTG_HS host channel-11 interrupt mask register

hctsiz0: Reg<u32, _HCTSIZ0>

0x110 - OTG_HS host channel-11 transfer size register

hcdma0: Reg<u32, _HCDMA0>

0x114 - OTG_HS host channel-0 DMA address register

hcchar1: Reg<u32, _HCCHAR1>

0x120 - OTG_HS host channel-1 characteristics register

hcsplt1: Reg<u32, _HCSPLT1>

0x124 - OTG_HS host channel-1 split control register

hcint1: Reg<u32, _HCINT1>

0x128 - OTG_HS host channel-1 interrupt register

hcintmsk1: Reg<u32, _HCINTMSK1>

0x12c - OTG_HS host channel-1 interrupt mask register

hctsiz1: Reg<u32, _HCTSIZ1>

0x130 - OTG_HS host channel-1 transfer size register

hcdma1: Reg<u32, _HCDMA1>

0x134 - OTG_HS host channel-1 DMA address register

hcchar2: Reg<u32, _HCCHAR2>

0x140 - OTG_HS host channel-2 characteristics register

hcsplt2: Reg<u32, _HCSPLT2>

0x144 - OTG_HS host channel-2 split control register

hcint2: Reg<u32, _HCINT2>

0x148 - OTG_HS host channel-2 interrupt register

hcintmsk2: Reg<u32, _HCINTMSK2>

0x14c - OTG_HS host channel-2 interrupt mask register

hctsiz2: Reg<u32, _HCTSIZ2>

0x150 - OTG_HS host channel-2 transfer size register

hcdma2: Reg<u32, _HCDMA2>

0x154 - OTG_HS host channel-2 DMA address register

hcchar3: Reg<u32, _HCCHAR3>

0x160 - OTG_HS host channel-3 characteristics register

hcsplt3: Reg<u32, _HCSPLT3>

0x164 - OTG_HS host channel-3 split control register

hcint3: Reg<u32, _HCINT3>

0x168 - OTG_HS host channel-3 interrupt register

hcintmsk3: Reg<u32, _HCINTMSK3>

0x16c - OTG_HS host channel-3 interrupt mask register

hctsiz3: Reg<u32, _HCTSIZ3>

0x170 - OTG_HS host channel-3 transfer size register

hcdma3: Reg<u32, _HCDMA3>

0x174 - OTG_HS host channel-3 DMA address register

hcchar4: Reg<u32, _HCCHAR4>

0x180 - OTG_HS host channel-4 characteristics register

hcsplt4: Reg<u32, _HCSPLT4>

0x184 - OTG_HS host channel-4 split control register

hcint4: Reg<u32, _HCINT4>

0x188 - OTG_HS host channel-4 interrupt register

hcintmsk4: Reg<u32, _HCINTMSK4>

0x18c - OTG_HS host channel-4 interrupt mask register

hctsiz4: Reg<u32, _HCTSIZ4>

0x190 - OTG_HS host channel-4 transfer size register

hcdma4: Reg<u32, _HCDMA4>

0x194 - OTG_HS host channel-4 DMA address register

hcchar5: Reg<u32, _HCCHAR5>

0x1a0 - OTG_HS host channel-5 characteristics register

hcsplt5: Reg<u32, _HCSPLT5>

0x1a4 - OTG_HS host channel-5 split control register

hcint5: Reg<u32, _HCINT5>

0x1a8 - OTG_HS host channel-5 interrupt register

hcintmsk5: Reg<u32, _HCINTMSK5>

0x1ac - OTG_HS host channel-5 interrupt mask register

hctsiz5: Reg<u32, _HCTSIZ5>

0x1b0 - OTG_HS host channel-5 transfer size register

hcdma5: Reg<u32, _HCDMA5>

0x1b4 - OTG_HS host channel-5 DMA address register

hcchar6: Reg<u32, _HCCHAR6>

0x1c0 - OTG_HS host channel-6 characteristics register

hcsplt6: Reg<u32, _HCSPLT6>

0x1c4 - OTG_HS host channel-6 split control register

hcint6: Reg<u32, _HCINT6>

0x1c8 - OTG_HS host channel-6 interrupt register

hcintmsk6: Reg<u32, _HCINTMSK6>

0x1cc - OTG_HS host channel-6 interrupt mask register

hctsiz6: Reg<u32, _HCTSIZ6>

0x1d0 - OTG_HS host channel-6 transfer size register

hcdma6: Reg<u32, _HCDMA6>

0x1d4 - OTG_HS host channel-6 DMA address register

hcchar7: Reg<u32, _HCCHAR7>

0x1e0 - OTG_HS host channel-7 characteristics register

hcsplt7: Reg<u32, _HCSPLT7>

0x1e4 - OTG_HS host channel-7 split control register

hcint7: Reg<u32, _HCINT7>

0x1e8 - OTG_HS host channel-7 interrupt register

hcintmsk7: Reg<u32, _HCINTMSK7>

0x1ec - OTG_HS host channel-7 interrupt mask register

hctsiz7: Reg<u32, _HCTSIZ7>

0x1f0 - OTG_HS host channel-7 transfer size register

hcdma7: Reg<u32, _HCDMA7>

0x1f4 - OTG_HS host channel-7 DMA address register

hcchar8: Reg<u32, _HCCHAR8>

0x200 - OTG_HS host channel-8 characteristics register

hcsplt8: Reg<u32, _HCSPLT8>

0x204 - OTG_HS host channel-8 split control register

hcint8: Reg<u32, _HCINT8>

0x208 - OTG_HS host channel-8 interrupt register

hcintmsk8: Reg<u32, _HCINTMSK8>

0x20c - OTG_HS host channel-8 interrupt mask register

hctsiz8: Reg<u32, _HCTSIZ8>

0x210 - OTG_HS host channel-8 transfer size register

hcdma8: Reg<u32, _HCDMA8>

0x214 - OTG_HS host channel-8 DMA address register

hcchar9: Reg<u32, _HCCHAR9>

0x220 - OTG_HS host channel-9 characteristics register

hcsplt9: Reg<u32, _HCSPLT9>

0x224 - OTG_HS host channel-9 split control register

hcint9: Reg<u32, _HCINT9>

0x228 - OTG_HS host channel-9 interrupt register

hcintmsk9: Reg<u32, _HCINTMSK9>

0x22c - OTG_HS host channel-9 interrupt mask register

hctsiz9: Reg<u32, _HCTSIZ9>

0x230 - OTG_HS host channel-9 transfer size register

hcdma9: Reg<u32, _HCDMA9>

0x234 - OTG_HS host channel-9 DMA address register

hcchar10: Reg<u32, _HCCHAR10>

0x240 - OTG_HS host channel-10 characteristics register

hcsplt10: Reg<u32, _HCSPLT10>

0x244 - OTG_HS host channel-10 split control register

hcint10: Reg<u32, _HCINT10>

0x248 - OTG_HS host channel-10 interrupt register

hcintmsk10: Reg<u32, _HCINTMSK10>

0x24c - OTG_HS host channel-10 interrupt mask register

hctsiz10: Reg<u32, _HCTSIZ10>

0x250 - OTG_HS host channel-10 transfer size register

hcdma10: Reg<u32, _HCDMA10>

0x254 - OTG_HS host channel-10 DMA address register

hcchar11: Reg<u32, _HCCHAR11>

0x260 - OTG_HS host channel-11 characteristics register

hcsplt11: Reg<u32, _HCSPLT11>

0x264 - OTG_HS host channel-11 split control register

hcint11: Reg<u32, _HCINT11>

0x268 - OTG_HS host channel-11 interrupt register

hcintmsk11: Reg<u32, _HCINTMSK11>

0x26c - OTG_HS host channel-11 interrupt mask register

hctsiz11: Reg<u32, _HCTSIZ11>

0x270 - OTG_HS host channel-11 transfer size register

hcdma11: Reg<u32, _HCDMA11>

0x274 - OTG_HS host channel-11 DMA address register

hcchar12: Reg<u32, _HCCHAR12>

0x278 - OTG_HS host channel-12 characteristics register

hcsplt12: Reg<u32, _HCSPLT12>

0x27c - OTG_HS host channel-12 split control register

hcint12: Reg<u32, _HCINT12>

0x280 - OTG_HS host channel-12 interrupt register

hcintmsk12: Reg<u32, _HCINTMSK12>

0x284 - OTG_HS host channel-12 interrupt mask register

hctsiz12: Reg<u32, _HCTSIZ12>

0x288 - OTG_HS host channel-12 transfer size register

hcdma12: Reg<u32, _HCDMA12>

0x28c - OTG_HS host channel-12 DMA address register

hcchar13: Reg<u32, _HCCHAR13>

0x290 - OTG_HS host channel-13 characteristics register

hcsplt13: Reg<u32, _HCSPLT13>

0x294 - OTG_HS host channel-13 split control register

hcint13: Reg<u32, _HCINT13>

0x298 - OTG_HS host channel-13 interrupt register

hcintmsk13: Reg<u32, _HCINTMSK13>

0x29c - OTG_HS host channel-13 interrupt mask register

hctsiz13: Reg<u32, _HCTSIZ13>

0x2a0 - OTG_HS host channel-13 transfer size register

hcdma13: Reg<u32, _HCDMA13>

0x2a4 - OTG_HS host channel-13 DMA address register

hcchar14: Reg<u32, _HCCHAR14>

0x2a8 - OTG_HS host channel-14 characteristics register

hcsplt14: Reg<u32, _HCSPLT14>

0x2ac - OTG_HS host channel-14 split control register

hcint14: Reg<u32, _HCINT14>

0x2b0 - OTG_HS host channel-14 interrupt register

hcintmsk14: Reg<u32, _HCINTMSK14>

0x2b4 - OTG_HS host channel-14 interrupt mask register

hctsiz14: Reg<u32, _HCTSIZ14>

0x2b8 - OTG_HS host channel-14 transfer size register

hcdma14: Reg<u32, _HCDMA14>

0x2bc - OTG_HS host channel-14 DMA address register

hcchar15: Reg<u32, _HCCHAR15>

0x2c0 - OTG_HS host channel-15 characteristics register

hcsplt15: Reg<u32, _HCSPLT15>

0x2c4 - OTG_HS host channel-15 split control register

hcint15: Reg<u32, _HCINT15>

0x2c8 - OTG_HS host channel-15 interrupt register

hcintmsk15: Reg<u32, _HCINTMSK15>

0x2cc - OTG_HS host channel-15 interrupt mask register

hctsiz15: Reg<u32, _HCTSIZ15>

0x2d0 - OTG_HS host channel-15 transfer size register

hcdma15: Reg<u32, _HCDMA15>

0x2d4 - OTG_HS host channel-15 DMA address register

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