Type Definition nuc1xx::fmc::ispcon::R

type R = R<u32, ISPCON>;

Reader of register ISPCON

Methods

impl R

pub fn ispen(&self) -> ISPEN_R

Bit 0 - ISP Enable ISP function enable bit. Set this bit to enable ISP function. 1 = Enable ISP function 0 = Disable ISP function

pub fn bs(&self) -> BS_R

Bit 1 - Boot Select Set/clear this bit to select next booting from LDROM/APROM, respectively. This bit also functions as chip booting status flag, which can be used to check where chip booted from. This bit is initiated with the inversed value of CBS in Config0 after power-on reset; It keeps the same value at other reset. 1 = boot from LDROM 0 = boot from APROM

pub fn cfguen(&self) -> CFGUEN_R

Bit 4 - Enable Config-bits Update by ISP LDROM update enable bit. 1 = Enable ISP can update config-bits. 0 = Disable ISP can update config-bits.

pub fn lduen(&self) -> LDUEN_R

Bit 5 - LDROM Update Enable LDROM update enable bit. 1 = LDROM can be updated when the MCU runs in APROM. 0 = LDROM can not be updated

pub fn ispff(&self) -> ISPFF_R

Bit 6 - ISP Fail Flag This bit is set by hardware when a triggered ISP meets any of the following conditions: (1) APROM writes to itself. (2) LDROM writes to itself. (3) CONFIG is erased/programmed if CFGUEN is set to 0. (4) Destination address is illegal, such as over an available range. Write 1 to clear.

pub fn pt(&self) -> PT_R

Bits 8:10 - Flash Program Time PT[2] PT[1] PT[0] Program Time (us) 0 0 0 40 0 0 1 45 0 1 0 50 0 1 1 55 1 0 0 20 1 0 1 25 1 1 0 30 1 1 1 35

pub fn et(&self) -> ET_R

Bits 12:14 - Flash Erase Time ET[2] ET[1] ET[0] Erase Time (ms) 0 0 0 20 (default) 0 0 1 25 0 1 0 30 0 1 1 35 1 0 0 3 1 0 1 5 1 1 0 10 1 1 1 15