nrf9160_pac/clock_ns/
intenclr.rs

1#[doc = "Register `INTENCLR` reader"]
2pub struct R(crate::R<INTENCLR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTENCLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTENCLR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTENCLR` writer"]
17pub struct W(crate::W<INTENCLR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTENCLR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTENCLR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HFCLKSTARTED` reader - Write '1' to disable interrupt for event HFCLKSTARTED"]
38pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
39#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41pub enum HFCLKSTARTED_A {
42    #[doc = "0: Read: Disabled"]
43    DISABLED = 0,
44    #[doc = "1: Read: Enabled"]
45    ENABLED = 1,
46}
47impl From<HFCLKSTARTED_A> for bool {
48    #[inline(always)]
49    fn from(variant: HFCLKSTARTED_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl HFCLKSTARTED_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> HFCLKSTARTED_A {
57        match self.bits {
58            false => HFCLKSTARTED_A::DISABLED,
59            true => HFCLKSTARTED_A::ENABLED,
60        }
61    }
62    #[doc = "Checks if the value of the field is `DISABLED`"]
63    #[inline(always)]
64    pub fn is_disabled(&self) -> bool {
65        *self == HFCLKSTARTED_A::DISABLED
66    }
67    #[doc = "Checks if the value of the field is `ENABLED`"]
68    #[inline(always)]
69    pub fn is_enabled(&self) -> bool {
70        *self == HFCLKSTARTED_A::ENABLED
71    }
72}
73#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
74#[derive(Clone, Copy, Debug, PartialEq)]
75pub enum HFCLKSTARTED_AW {
76    #[doc = "1: Disable"]
77    CLEAR = 1,
78}
79impl From<HFCLKSTARTED_AW> for bool {
80    #[inline(always)]
81    fn from(variant: HFCLKSTARTED_AW) -> Self {
82        variant as u8 != 0
83    }
84}
85#[doc = "Field `HFCLKSTARTED` writer - Write '1' to disable interrupt for event HFCLKSTARTED"]
86pub type HFCLKSTARTED_W<'a, const O: u8> =
87    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKSTARTED_AW, O>;
88impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
89    #[doc = "Disable"]
90    #[inline(always)]
91    pub fn clear(self) -> &'a mut W {
92        self.variant(HFCLKSTARTED_AW::CLEAR)
93    }
94}
95#[doc = "Field `LFCLKSTARTED` reader - Write '1' to disable interrupt for event LFCLKSTARTED"]
96pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
97#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
98#[derive(Clone, Copy, Debug, PartialEq)]
99pub enum LFCLKSTARTED_A {
100    #[doc = "0: Read: Disabled"]
101    DISABLED = 0,
102    #[doc = "1: Read: Enabled"]
103    ENABLED = 1,
104}
105impl From<LFCLKSTARTED_A> for bool {
106    #[inline(always)]
107    fn from(variant: LFCLKSTARTED_A) -> Self {
108        variant as u8 != 0
109    }
110}
111impl LFCLKSTARTED_R {
112    #[doc = "Get enumerated values variant"]
113    #[inline(always)]
114    pub fn variant(&self) -> LFCLKSTARTED_A {
115        match self.bits {
116            false => LFCLKSTARTED_A::DISABLED,
117            true => LFCLKSTARTED_A::ENABLED,
118        }
119    }
120    #[doc = "Checks if the value of the field is `DISABLED`"]
121    #[inline(always)]
122    pub fn is_disabled(&self) -> bool {
123        *self == LFCLKSTARTED_A::DISABLED
124    }
125    #[doc = "Checks if the value of the field is `ENABLED`"]
126    #[inline(always)]
127    pub fn is_enabled(&self) -> bool {
128        *self == LFCLKSTARTED_A::ENABLED
129    }
130}
131#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
132#[derive(Clone, Copy, Debug, PartialEq)]
133pub enum LFCLKSTARTED_AW {
134    #[doc = "1: Disable"]
135    CLEAR = 1,
136}
137impl From<LFCLKSTARTED_AW> for bool {
138    #[inline(always)]
139    fn from(variant: LFCLKSTARTED_AW) -> Self {
140        variant as u8 != 0
141    }
142}
143#[doc = "Field `LFCLKSTARTED` writer - Write '1' to disable interrupt for event LFCLKSTARTED"]
144pub type LFCLKSTARTED_W<'a, const O: u8> =
145    crate::BitWriter<'a, u32, INTENCLR_SPEC, LFCLKSTARTED_AW, O>;
146impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
147    #[doc = "Disable"]
148    #[inline(always)]
149    pub fn clear(self) -> &'a mut W {
150        self.variant(LFCLKSTARTED_AW::CLEAR)
151    }
152}
153impl R {
154    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
155    #[inline(always)]
156    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
157        HFCLKSTARTED_R::new((self.bits & 1) != 0)
158    }
159    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
160    #[inline(always)]
161    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
162        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
163    }
164}
165impl W {
166    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
167    #[inline(always)]
168    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
169        HFCLKSTARTED_W::new(self)
170    }
171    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
172    #[inline(always)]
173    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
174        LFCLKSTARTED_W::new(self)
175    }
176    #[doc = "Writes raw bits to the register."]
177    #[inline(always)]
178    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
179        self.0.bits(bits);
180        self
181    }
182}
183#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
184pub struct INTENCLR_SPEC;
185impl crate::RegisterSpec for INTENCLR_SPEC {
186    type Ux = u32;
187}
188#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
189impl crate::Readable for INTENCLR_SPEC {
190    type Reader = R;
191}
192#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
193impl crate::Writable for INTENCLR_SPEC {
194    type Writer = W;
195}
196#[doc = "`reset()` method sets INTENCLR to value 0"]
197impl crate::Resettable for INTENCLR_SPEC {
198    #[inline(always)]
199    fn reset_value() -> Self::Ux {
200        0
201    }
202}
nrf9160_pac/clock_ns/intenclr.rs

nrf9160_pac/clock_ns/
intenclr.rs
