[−][src]Module nrf9160_hal::pac
Peripheral access API for NRF9160 microcontrollers (generated using svd2rust v0.17.0)
You can find an overview of the API here.
Modules
cc_host_rgf_s | CRYPTOCELL HOST_RGF interface |
clock_ns | Clock management 0 |
cryptocell_s | ARM TrustZone CryptoCell register interface |
ctrl_ap_peri_s | Control access port |
dppic_ns | Distributed Programmable Peripheral Interconnect Controller 0 |
egu0_ns | Event generator unit 0 |
ficr_s | Factory Information Configuration Registers |
fpu_ns | FPU 0 |
generic | Common register and bit access and modify traits |
gpiote0_s | GPIO Tasks and Events 0 |
i2s_ns | Inter-IC Sound 0 |
ipc_ns | Inter Processor Communication 0 |
kmu_ns | Key management unit 0 |
nvmc_ns | Non-volatile memory controller 0 |
p0_ns | GPIO Port 0 |
pdm_ns | Pulse Density Modulation (Digital Microphone) Interface 0 |
power_ns | Power control 0 |
pwm0_ns | Pulse width modulation unit 0 |
regulators_ns | Voltage regulators control 0 |
rtc0_ns | Real-time counter 0 |
saadc_ns | Analog to Digital Converter 0 |
spim0_ns | Serial Peripheral Interface Master with EasyDMA 0 |
spis0_ns | SPI Slave 0 |
spu_s | System protection unit |
tad_s | Trace and debug control |
timer0_ns | Timer/Counter 0 |
twim0_ns | I2C compatible Two-Wire Master Interface with EasyDMA 0 |
twis0_ns | I2C compatible Two-Wire Slave Interface with EasyDMA 0 |
uarte0_ns | UART with EasyDMA 0 |
uicr_s | User information configuration registers User information configuration registers |
vmc_ns | Volatile Memory controller 0 |
wdt_ns | Watchdog Timer 0 |
Structs
CBP | Cache and branch predictor maintenance operations |
CC_HOST_RGF_S | CRYPTOCELL HOST_RGF interface |
CLOCK_NS | Clock management 0 |
CLOCK_S | Clock management 1 |
CPUID | CPUID |
CRYPTOCELL_S | ARM TrustZone CryptoCell register interface |
CTRL_AP_PERI_S | Control access port |
CorePeripherals | Core peripherals |
DCB | Debug Control Block |
DPPIC_NS | Distributed Programmable Peripheral Interconnect Controller 0 |
DPPIC_S | Distributed Programmable Peripheral Interconnect Controller 1 |
DWT | Data Watchpoint and Trace unit |
EGU0_S | Event generator unit 1 |
EGU0_NS | Event generator unit 0 |
EGU1_NS | Event generator unit 2 |
EGU1_S | Event generator unit 3 |
EGU2_NS | Event generator unit 4 |
EGU2_S | Event generator unit 5 |
EGU3_NS | Event generator unit 6 |
EGU3_S | Event generator unit 7 |
EGU4_NS | Event generator unit 8 |
EGU4_S | Event generator unit 9 |
EGU5_NS | Event generator unit 10 |
EGU5_S | Event generator unit 11 |
FICR_S | Factory Information Configuration Registers |
FPB | Flash Patch and Breakpoint unit |
FPU | Floating Point Unit |
FPU_NS | FPU 0 |
FPU_S | FPU 1 |
GPIOTE0_S | GPIO Tasks and Events 0 |
GPIOTE1_NS | GPIO Tasks and Events 1 |
I2S_NS | Inter-IC Sound 0 |
I2S_S | Inter-IC Sound 1 |
IPC_NS | Inter Processor Communication 0 |
IPC_S | Inter Processor Communication 1 |
ITM | Instrumentation Trace Macrocell |
KMU_NS | Key management unit 0 |
KMU_S | Key management unit 1 |
MPU | Memory Protection Unit |
NVIC | Nested Vector Interrupt Controller |
NVMC_NS | Non-volatile memory controller 0 |
NVMC_S | Non-volatile memory controller 1 |
P0_S | GPIO Port 1 |
P0_NS | GPIO Port 0 |
PDM_NS | Pulse Density Modulation (Digital Microphone) Interface 0 |
PDM_S | Pulse Density Modulation (Digital Microphone) Interface 1 |
POWER_NS | Power control 0 |
POWER_S | Power control 1 |
PWM0_S | Pulse width modulation unit 1 |
PWM0_NS | Pulse width modulation unit 0 |
PWM1_NS | Pulse width modulation unit 2 |
PWM1_S | Pulse width modulation unit 3 |
PWM2_NS | Pulse width modulation unit 4 |
PWM2_S | Pulse width modulation unit 5 |
PWM3_NS | Pulse width modulation unit 6 |
PWM3_S | Pulse width modulation unit 7 |
Peripherals | All the peripherals |
REGULATORS_NS | Voltage regulators control 0 |
REGULATORS_S | Voltage regulators control 1 |
RTC0_S | Real-time counter 1 |
RTC0_NS | Real-time counter 0 |
RTC1_NS | Real-time counter 2 |
RTC1_S | Real-time counter 3 |
SAADC_NS | Analog to Digital Converter 0 |
SAADC_S | Analog to Digital Converter 1 |
SCB | System Control Block |
SPIM0_S | Serial Peripheral Interface Master with EasyDMA 1 |
SPIM0_NS | Serial Peripheral Interface Master with EasyDMA 0 |
SPIM1_NS | Serial Peripheral Interface Master with EasyDMA 2 |
SPIM1_S | Serial Peripheral Interface Master with EasyDMA 3 |
SPIM2_NS | Serial Peripheral Interface Master with EasyDMA 4 |
SPIM2_S | Serial Peripheral Interface Master with EasyDMA 5 |
SPIM3_NS | Serial Peripheral Interface Master with EasyDMA 6 |
SPIM3_S | Serial Peripheral Interface Master with EasyDMA 7 |
SPIS0_S | SPI Slave 1 |
SPIS0_NS | SPI Slave 0 |
SPIS1_NS | SPI Slave 2 |
SPIS1_S | SPI Slave 3 |
SPIS2_NS | SPI Slave 4 |
SPIS2_S | SPI Slave 5 |
SPIS3_NS | SPI Slave 6 |
SPIS3_S | SPI Slave 7 |
SPU_S | System protection unit |
SYST | SysTick: System Timer |
TAD_S | Trace and debug control |
TIMER0_S | Timer/Counter 1 |
TIMER0_NS | Timer/Counter 0 |
TIMER1_NS | Timer/Counter 2 |
TIMER1_S | Timer/Counter 3 |
TIMER2_NS | Timer/Counter 4 |
TIMER2_S | Timer/Counter 5 |
TPIU | Trace Port Interface Unit |
TWIM0_S | I2C compatible Two-Wire Master Interface with EasyDMA 1 |
TWIM0_NS | I2C compatible Two-Wire Master Interface with EasyDMA 0 |
TWIM1_NS | I2C compatible Two-Wire Master Interface with EasyDMA 2 |
TWIM1_S | I2C compatible Two-Wire Master Interface with EasyDMA 3 |
TWIM2_NS | I2C compatible Two-Wire Master Interface with EasyDMA 4 |
TWIM2_S | I2C compatible Two-Wire Master Interface with EasyDMA 5 |
TWIM3_NS | I2C compatible Two-Wire Master Interface with EasyDMA 6 |
TWIM3_S | I2C compatible Two-Wire Master Interface with EasyDMA 7 |
TWIS0_S | I2C compatible Two-Wire Slave Interface with EasyDMA 1 |
TWIS0_NS | I2C compatible Two-Wire Slave Interface with EasyDMA 0 |
TWIS1_NS | I2C compatible Two-Wire Slave Interface with EasyDMA 2 |
TWIS1_S | I2C compatible Two-Wire Slave Interface with EasyDMA 3 |
TWIS2_NS | I2C compatible Two-Wire Slave Interface with EasyDMA 4 |
TWIS2_S | I2C compatible Two-Wire Slave Interface with EasyDMA 5 |
TWIS3_NS | I2C compatible Two-Wire Slave Interface with EasyDMA 6 |
TWIS3_S | I2C compatible Two-Wire Slave Interface with EasyDMA 7 |
UARTE0_S | UART with EasyDMA 1 |
UARTE0_NS | UART with EasyDMA 0 |
UARTE1_NS | UART with EasyDMA 2 |
UARTE1_S | UART with EasyDMA 3 |
UARTE2_NS | UART with EasyDMA 4 |
UARTE2_S | UART with EasyDMA 5 |
UARTE3_NS | UART with EasyDMA 6 |
UARTE3_S | UART with EasyDMA 7 |
UICR_S | User information configuration registers User information configuration registers |
VMC_NS | Volatile Memory controller 0 |
VMC_S | Volatile Memory controller 1 |
WDT_NS | Watchdog Timer 0 |
WDT_S | Watchdog Timer 1 |
Enums
Interrupt | Enumeration of all the interrupts |
interrupt | Enumeration of all the interrupts |
Constants
NVIC_PRIO_BITS | Number available in the NVIC for configuring priority |
Attribute Macros
interrupt | Attribute to declare an interrupt (AKA device-specific exception) handler |