nrf91/
p0_ns.rs

1#[doc = r" Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    _reserved0: [u8; 4usize],
5    #[doc = "0x04 - Write GPIO port"]
6    pub out: OUT,
7    #[doc = "0x08 - Set individual bits in GPIO port"]
8    pub outset: OUTSET,
9    #[doc = "0x0c - Clear individual bits in GPIO port"]
10    pub outclr: OUTCLR,
11    #[doc = "0x10 - Read GPIO port"]
12    pub in_: IN,
13    #[doc = "0x14 - Direction of GPIO pins"]
14    pub dir: DIR,
15    #[doc = "0x18 - DIR set register"]
16    pub dirset: DIRSET,
17    #[doc = "0x1c - DIR clear register"]
18    pub dirclr: DIRCLR,
19    #[doc = "0x20 - Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF\\[n\\].SENSE registers"]
20    pub latch: LATCH,
21    #[doc = "0x24 - Select between default DETECT signal behaviour and LDETECT mode (For non-secure pin only)"]
22    pub detectmode: DETECTMODE,
23    #[doc = "0x28 - Select between default DETECT signal behaviour and LDETECT mode (For secure pin only)"]
24    pub detectmode_sec: DETECTMODE_SEC,
25    _reserved1: [u8; 468usize],
26    #[doc = "0x200 - Description collection: Configuration of GPIO pins"]
27    pub pin_cnf: [PIN_CNF; 32],
28}
29#[doc = "Write GPIO port"]
30pub struct OUT {
31    register: ::vcell::VolatileCell<u32>,
32}
33#[doc = "Write GPIO port"]
34pub mod out;
35#[doc = "Set individual bits in GPIO port"]
36pub struct OUTSET {
37    register: ::vcell::VolatileCell<u32>,
38}
39#[doc = "Set individual bits in GPIO port"]
40pub mod outset;
41#[doc = "Clear individual bits in GPIO port"]
42pub struct OUTCLR {
43    register: ::vcell::VolatileCell<u32>,
44}
45#[doc = "Clear individual bits in GPIO port"]
46pub mod outclr;
47#[doc = "Read GPIO port"]
48pub struct IN {
49    register: ::vcell::VolatileCell<u32>,
50}
51#[doc = "Read GPIO port"]
52pub mod in_;
53#[doc = "Direction of GPIO pins"]
54pub struct DIR {
55    register: ::vcell::VolatileCell<u32>,
56}
57#[doc = "Direction of GPIO pins"]
58pub mod dir;
59#[doc = "DIR set register"]
60pub struct DIRSET {
61    register: ::vcell::VolatileCell<u32>,
62}
63#[doc = "DIR set register"]
64pub mod dirset;
65#[doc = "DIR clear register"]
66pub struct DIRCLR {
67    register: ::vcell::VolatileCell<u32>,
68}
69#[doc = "DIR clear register"]
70pub mod dirclr;
71#[doc = "Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF\\[n\\].SENSE registers"]
72pub struct LATCH {
73    register: ::vcell::VolatileCell<u32>,
74}
75#[doc = "Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF\\[n\\].SENSE registers"]
76pub mod latch;
77#[doc = "Select between default DETECT signal behaviour and LDETECT mode (For non-secure pin only)"]
78pub struct DETECTMODE {
79    register: ::vcell::VolatileCell<u32>,
80}
81#[doc = "Select between default DETECT signal behaviour and LDETECT mode (For non-secure pin only)"]
82pub mod detectmode;
83#[doc = "Select between default DETECT signal behaviour and LDETECT mode (For secure pin only)"]
84pub struct DETECTMODE_SEC {
85    register: ::vcell::VolatileCell<u32>,
86}
87#[doc = "Select between default DETECT signal behaviour and LDETECT mode (For secure pin only)"]
88pub mod detectmode_sec;
89#[doc = "Description collection: Configuration of GPIO pins"]
90pub struct PIN_CNF {
91    register: ::vcell::VolatileCell<u32>,
92}
93#[doc = "Description collection: Configuration of GPIO pins"]
94pub mod pin_cnf;
nrf91/p0_ns.rs

nrf91/
p0_ns.rs
