Struct nrf5340_net_pac::spim0_ns::iftiming::rxdelay::RXDELAY_W

pub struct RXDELAY_W<'a> { /* fields omitted */ }

Field RXDELAY writer - Sample delay for input serial data on MISO. The value specifies the number of 64 MHz clock cycles (15.625 ns) delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until the input serial data is sampled. As en example, if RXDELAY = 0 and CONFIG.CPHA = 0, the input serial data is sampled on the rising edge of SCK.

Implementations

impl<'a> RXDELAY_W<'a>

pub unsafe fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field