Struct nrf5340_net_pac::p0_ns::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock { pub out: Reg<OUT_SPEC>, pub outset: Reg<OUTSET_SPEC>, pub outclr: Reg<OUTCLR_SPEC>, pub in_: Reg<IN_SPEC>, pub dir: Reg<DIR_SPEC>, pub dirset: Reg<DIRSET_SPEC>, pub dirclr: Reg<DIRCLR_SPEC>, pub latch: Reg<LATCH_SPEC>, pub detectmode: Reg<DETECTMODE_SPEC>, pub detectmode_sec: Reg<DETECTMODE_SEC_SPEC>, pub pin_cnf: [Reg<PIN_CNF_SPEC>; 32], // some fields omitted }
Expand description
Register block
Fields
out: Reg<OUT_SPEC>
0x04 - Write GPIO port
outset: Reg<OUTSET_SPEC>
0x08 - Set individual bits in GPIO port
outclr: Reg<OUTCLR_SPEC>
0x0c - Clear individual bits in GPIO port
in_: Reg<IN_SPEC>
0x10 - Read GPIO port
dir: Reg<DIR_SPEC>
0x14 - Direction of GPIO pins
dirset: Reg<DIRSET_SPEC>
0x18 - DIR set register
dirclr: Reg<DIRCLR_SPEC>
0x1c - DIR clear register
latch: Reg<LATCH_SPEC>
0x20 - Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers
detectmode: Reg<DETECTMODE_SPEC>
0x24 - Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)
detectmode_sec: Reg<DETECTMODE_SEC_SPEC>
0x28 - Select between default DETECT signal behavior and LDETECT mode (For secure pin only)
pin_cnf: [Reg<PIN_CNF_SPEC>; 32]
0x200..0x280 - Description collection: Configuration of GPIO pins