nrf5340_app_pac/fpu_ns/
inten.rs

1#[doc = "Register `INTEN` reader"]
2pub struct R(crate::R<INTEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTEN` writer"]
17pub struct W(crate::W<INTEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `INVALIDOPERATION` reader - Enable or disable interrupt for event INVALIDOPERATION"]
38pub type INVALIDOPERATION_R = crate::BitReader<INVALIDOPERATION_A>;
39#[doc = "Enable or disable interrupt for event INVALIDOPERATION\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41pub enum INVALIDOPERATION_A {
42    #[doc = "0: Disable"]
43    DISABLED = 0,
44    #[doc = "1: Enable"]
45    ENABLED = 1,
46}
47impl From<INVALIDOPERATION_A> for bool {
48    #[inline(always)]
49    fn from(variant: INVALIDOPERATION_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl INVALIDOPERATION_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> INVALIDOPERATION_A {
57        match self.bits {
58            false => INVALIDOPERATION_A::DISABLED,
59            true => INVALIDOPERATION_A::ENABLED,
60        }
61    }
62    #[doc = "Checks if the value of the field is `DISABLED`"]
63    #[inline(always)]
64    pub fn is_disabled(&self) -> bool {
65        *self == INVALIDOPERATION_A::DISABLED
66    }
67    #[doc = "Checks if the value of the field is `ENABLED`"]
68    #[inline(always)]
69    pub fn is_enabled(&self) -> bool {
70        *self == INVALIDOPERATION_A::ENABLED
71    }
72}
73#[doc = "Field `INVALIDOPERATION` writer - Enable or disable interrupt for event INVALIDOPERATION"]
74pub type INVALIDOPERATION_W<'a, const O: u8> =
75    crate::BitWriter<'a, u32, INTEN_SPEC, INVALIDOPERATION_A, O>;
76impl<'a, const O: u8> INVALIDOPERATION_W<'a, O> {
77    #[doc = "Disable"]
78    #[inline(always)]
79    pub fn disabled(self) -> &'a mut W {
80        self.variant(INVALIDOPERATION_A::DISABLED)
81    }
82    #[doc = "Enable"]
83    #[inline(always)]
84    pub fn enabled(self) -> &'a mut W {
85        self.variant(INVALIDOPERATION_A::ENABLED)
86    }
87}
88#[doc = "Field `DIVIDEBYZERO` reader - Enable or disable interrupt for event DIVIDEBYZERO"]
89pub type DIVIDEBYZERO_R = crate::BitReader<DIVIDEBYZERO_A>;
90#[doc = "Enable or disable interrupt for event DIVIDEBYZERO\n\nValue on reset: 0"]
91#[derive(Clone, Copy, Debug, PartialEq)]
92pub enum DIVIDEBYZERO_A {
93    #[doc = "0: Disable"]
94    DISABLED = 0,
95    #[doc = "1: Enable"]
96    ENABLED = 1,
97}
98impl From<DIVIDEBYZERO_A> for bool {
99    #[inline(always)]
100    fn from(variant: DIVIDEBYZERO_A) -> Self {
101        variant as u8 != 0
102    }
103}
104impl DIVIDEBYZERO_R {
105    #[doc = "Get enumerated values variant"]
106    #[inline(always)]
107    pub fn variant(&self) -> DIVIDEBYZERO_A {
108        match self.bits {
109            false => DIVIDEBYZERO_A::DISABLED,
110            true => DIVIDEBYZERO_A::ENABLED,
111        }
112    }
113    #[doc = "Checks if the value of the field is `DISABLED`"]
114    #[inline(always)]
115    pub fn is_disabled(&self) -> bool {
116        *self == DIVIDEBYZERO_A::DISABLED
117    }
118    #[doc = "Checks if the value of the field is `ENABLED`"]
119    #[inline(always)]
120    pub fn is_enabled(&self) -> bool {
121        *self == DIVIDEBYZERO_A::ENABLED
122    }
123}
124#[doc = "Field `DIVIDEBYZERO` writer - Enable or disable interrupt for event DIVIDEBYZERO"]
125pub type DIVIDEBYZERO_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, DIVIDEBYZERO_A, O>;
126impl<'a, const O: u8> DIVIDEBYZERO_W<'a, O> {
127    #[doc = "Disable"]
128    #[inline(always)]
129    pub fn disabled(self) -> &'a mut W {
130        self.variant(DIVIDEBYZERO_A::DISABLED)
131    }
132    #[doc = "Enable"]
133    #[inline(always)]
134    pub fn enabled(self) -> &'a mut W {
135        self.variant(DIVIDEBYZERO_A::ENABLED)
136    }
137}
138#[doc = "Field `OVERFLOW` reader - Enable or disable interrupt for event OVERFLOW"]
139pub type OVERFLOW_R = crate::BitReader<OVERFLOW_A>;
140#[doc = "Enable or disable interrupt for event OVERFLOW\n\nValue on reset: 0"]
141#[derive(Clone, Copy, Debug, PartialEq)]
142pub enum OVERFLOW_A {
143    #[doc = "0: Disable"]
144    DISABLED = 0,
145    #[doc = "1: Enable"]
146    ENABLED = 1,
147}
148impl From<OVERFLOW_A> for bool {
149    #[inline(always)]
150    fn from(variant: OVERFLOW_A) -> Self {
151        variant as u8 != 0
152    }
153}
154impl OVERFLOW_R {
155    #[doc = "Get enumerated values variant"]
156    #[inline(always)]
157    pub fn variant(&self) -> OVERFLOW_A {
158        match self.bits {
159            false => OVERFLOW_A::DISABLED,
160            true => OVERFLOW_A::ENABLED,
161        }
162    }
163    #[doc = "Checks if the value of the field is `DISABLED`"]
164    #[inline(always)]
165    pub fn is_disabled(&self) -> bool {
166        *self == OVERFLOW_A::DISABLED
167    }
168    #[doc = "Checks if the value of the field is `ENABLED`"]
169    #[inline(always)]
170    pub fn is_enabled(&self) -> bool {
171        *self == OVERFLOW_A::ENABLED
172    }
173}
174#[doc = "Field `OVERFLOW` writer - Enable or disable interrupt for event OVERFLOW"]
175pub type OVERFLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, OVERFLOW_A, O>;
176impl<'a, const O: u8> OVERFLOW_W<'a, O> {
177    #[doc = "Disable"]
178    #[inline(always)]
179    pub fn disabled(self) -> &'a mut W {
180        self.variant(OVERFLOW_A::DISABLED)
181    }
182    #[doc = "Enable"]
183    #[inline(always)]
184    pub fn enabled(self) -> &'a mut W {
185        self.variant(OVERFLOW_A::ENABLED)
186    }
187}
188#[doc = "Field `UNDERFLOW` reader - Enable or disable interrupt for event UNDERFLOW"]
189pub type UNDERFLOW_R = crate::BitReader<UNDERFLOW_A>;
190#[doc = "Enable or disable interrupt for event UNDERFLOW\n\nValue on reset: 0"]
191#[derive(Clone, Copy, Debug, PartialEq)]
192pub enum UNDERFLOW_A {
193    #[doc = "0: Disable"]
194    DISABLED = 0,
195    #[doc = "1: Enable"]
196    ENABLED = 1,
197}
198impl From<UNDERFLOW_A> for bool {
199    #[inline(always)]
200    fn from(variant: UNDERFLOW_A) -> Self {
201        variant as u8 != 0
202    }
203}
204impl UNDERFLOW_R {
205    #[doc = "Get enumerated values variant"]
206    #[inline(always)]
207    pub fn variant(&self) -> UNDERFLOW_A {
208        match self.bits {
209            false => UNDERFLOW_A::DISABLED,
210            true => UNDERFLOW_A::ENABLED,
211        }
212    }
213    #[doc = "Checks if the value of the field is `DISABLED`"]
214    #[inline(always)]
215    pub fn is_disabled(&self) -> bool {
216        *self == UNDERFLOW_A::DISABLED
217    }
218    #[doc = "Checks if the value of the field is `ENABLED`"]
219    #[inline(always)]
220    pub fn is_enabled(&self) -> bool {
221        *self == UNDERFLOW_A::ENABLED
222    }
223}
224#[doc = "Field `UNDERFLOW` writer - Enable or disable interrupt for event UNDERFLOW"]
225pub type UNDERFLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, UNDERFLOW_A, O>;
226impl<'a, const O: u8> UNDERFLOW_W<'a, O> {
227    #[doc = "Disable"]
228    #[inline(always)]
229    pub fn disabled(self) -> &'a mut W {
230        self.variant(UNDERFLOW_A::DISABLED)
231    }
232    #[doc = "Enable"]
233    #[inline(always)]
234    pub fn enabled(self) -> &'a mut W {
235        self.variant(UNDERFLOW_A::ENABLED)
236    }
237}
238#[doc = "Field `INEXACT` reader - Enable or disable interrupt for event INEXACT"]
239pub type INEXACT_R = crate::BitReader<INEXACT_A>;
240#[doc = "Enable or disable interrupt for event INEXACT\n\nValue on reset: 0"]
241#[derive(Clone, Copy, Debug, PartialEq)]
242pub enum INEXACT_A {
243    #[doc = "0: Disable"]
244    DISABLED = 0,
245    #[doc = "1: Enable"]
246    ENABLED = 1,
247}
248impl From<INEXACT_A> for bool {
249    #[inline(always)]
250    fn from(variant: INEXACT_A) -> Self {
251        variant as u8 != 0
252    }
253}
254impl INEXACT_R {
255    #[doc = "Get enumerated values variant"]
256    #[inline(always)]
257    pub fn variant(&self) -> INEXACT_A {
258        match self.bits {
259            false => INEXACT_A::DISABLED,
260            true => INEXACT_A::ENABLED,
261        }
262    }
263    #[doc = "Checks if the value of the field is `DISABLED`"]
264    #[inline(always)]
265    pub fn is_disabled(&self) -> bool {
266        *self == INEXACT_A::DISABLED
267    }
268    #[doc = "Checks if the value of the field is `ENABLED`"]
269    #[inline(always)]
270    pub fn is_enabled(&self) -> bool {
271        *self == INEXACT_A::ENABLED
272    }
273}
274#[doc = "Field `INEXACT` writer - Enable or disable interrupt for event INEXACT"]
275pub type INEXACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, INEXACT_A, O>;
276impl<'a, const O: u8> INEXACT_W<'a, O> {
277    #[doc = "Disable"]
278    #[inline(always)]
279    pub fn disabled(self) -> &'a mut W {
280        self.variant(INEXACT_A::DISABLED)
281    }
282    #[doc = "Enable"]
283    #[inline(always)]
284    pub fn enabled(self) -> &'a mut W {
285        self.variant(INEXACT_A::ENABLED)
286    }
287}
288#[doc = "Field `DENORMALINPUT` reader - Enable or disable interrupt for event DENORMALINPUT"]
289pub type DENORMALINPUT_R = crate::BitReader<DENORMALINPUT_A>;
290#[doc = "Enable or disable interrupt for event DENORMALINPUT\n\nValue on reset: 0"]
291#[derive(Clone, Copy, Debug, PartialEq)]
292pub enum DENORMALINPUT_A {
293    #[doc = "0: Disable"]
294    DISABLED = 0,
295    #[doc = "1: Enable"]
296    ENABLED = 1,
297}
298impl From<DENORMALINPUT_A> for bool {
299    #[inline(always)]
300    fn from(variant: DENORMALINPUT_A) -> Self {
301        variant as u8 != 0
302    }
303}
304impl DENORMALINPUT_R {
305    #[doc = "Get enumerated values variant"]
306    #[inline(always)]
307    pub fn variant(&self) -> DENORMALINPUT_A {
308        match self.bits {
309            false => DENORMALINPUT_A::DISABLED,
310            true => DENORMALINPUT_A::ENABLED,
311        }
312    }
313    #[doc = "Checks if the value of the field is `DISABLED`"]
314    #[inline(always)]
315    pub fn is_disabled(&self) -> bool {
316        *self == DENORMALINPUT_A::DISABLED
317    }
318    #[doc = "Checks if the value of the field is `ENABLED`"]
319    #[inline(always)]
320    pub fn is_enabled(&self) -> bool {
321        *self == DENORMALINPUT_A::ENABLED
322    }
323}
324#[doc = "Field `DENORMALINPUT` writer - Enable or disable interrupt for event DENORMALINPUT"]
325pub type DENORMALINPUT_W<'a, const O: u8> =
326    crate::BitWriter<'a, u32, INTEN_SPEC, DENORMALINPUT_A, O>;
327impl<'a, const O: u8> DENORMALINPUT_W<'a, O> {
328    #[doc = "Disable"]
329    #[inline(always)]
330    pub fn disabled(self) -> &'a mut W {
331        self.variant(DENORMALINPUT_A::DISABLED)
332    }
333    #[doc = "Enable"]
334    #[inline(always)]
335    pub fn enabled(self) -> &'a mut W {
336        self.variant(DENORMALINPUT_A::ENABLED)
337    }
338}
339impl R {
340    #[doc = "Bit 0 - Enable or disable interrupt for event INVALIDOPERATION"]
341    #[inline(always)]
342    pub fn invalidoperation(&self) -> INVALIDOPERATION_R {
343        INVALIDOPERATION_R::new((self.bits & 1) != 0)
344    }
345    #[doc = "Bit 1 - Enable or disable interrupt for event DIVIDEBYZERO"]
346    #[inline(always)]
347    pub fn dividebyzero(&self) -> DIVIDEBYZERO_R {
348        DIVIDEBYZERO_R::new(((self.bits >> 1) & 1) != 0)
349    }
350    #[doc = "Bit 2 - Enable or disable interrupt for event OVERFLOW"]
351    #[inline(always)]
352    pub fn overflow(&self) -> OVERFLOW_R {
353        OVERFLOW_R::new(((self.bits >> 2) & 1) != 0)
354    }
355    #[doc = "Bit 3 - Enable or disable interrupt for event UNDERFLOW"]
356    #[inline(always)]
357    pub fn underflow(&self) -> UNDERFLOW_R {
358        UNDERFLOW_R::new(((self.bits >> 3) & 1) != 0)
359    }
360    #[doc = "Bit 4 - Enable or disable interrupt for event INEXACT"]
361    #[inline(always)]
362    pub fn inexact(&self) -> INEXACT_R {
363        INEXACT_R::new(((self.bits >> 4) & 1) != 0)
364    }
365    #[doc = "Bit 5 - Enable or disable interrupt for event DENORMALINPUT"]
366    #[inline(always)]
367    pub fn denormalinput(&self) -> DENORMALINPUT_R {
368        DENORMALINPUT_R::new(((self.bits >> 5) & 1) != 0)
369    }
370}
371impl W {
372    #[doc = "Bit 0 - Enable or disable interrupt for event INVALIDOPERATION"]
373    #[inline(always)]
374    pub fn invalidoperation(&mut self) -> INVALIDOPERATION_W<0> {
375        INVALIDOPERATION_W::new(self)
376    }
377    #[doc = "Bit 1 - Enable or disable interrupt for event DIVIDEBYZERO"]
378    #[inline(always)]
379    pub fn dividebyzero(&mut self) -> DIVIDEBYZERO_W<1> {
380        DIVIDEBYZERO_W::new(self)
381    }
382    #[doc = "Bit 2 - Enable or disable interrupt for event OVERFLOW"]
383    #[inline(always)]
384    pub fn overflow(&mut self) -> OVERFLOW_W<2> {
385        OVERFLOW_W::new(self)
386    }
387    #[doc = "Bit 3 - Enable or disable interrupt for event UNDERFLOW"]
388    #[inline(always)]
389    pub fn underflow(&mut self) -> UNDERFLOW_W<3> {
390        UNDERFLOW_W::new(self)
391    }
392    #[doc = "Bit 4 - Enable or disable interrupt for event INEXACT"]
393    #[inline(always)]
394    pub fn inexact(&mut self) -> INEXACT_W<4> {
395        INEXACT_W::new(self)
396    }
397    #[doc = "Bit 5 - Enable or disable interrupt for event DENORMALINPUT"]
398    #[inline(always)]
399    pub fn denormalinput(&mut self) -> DENORMALINPUT_W<5> {
400        DENORMALINPUT_W::new(self)
401    }
402    #[doc = "Writes raw bits to the register."]
403    #[inline(always)]
404    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
405        self.0.bits(bits);
406        self
407    }
408}
409#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
410pub struct INTEN_SPEC;
411impl crate::RegisterSpec for INTEN_SPEC {
412    type Ux = u32;
413}
414#[doc = "`read()` method returns [inten::R](R) reader structure"]
415impl crate::Readable for INTEN_SPEC {
416    type Reader = R;
417}
418#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
419impl crate::Writable for INTEN_SPEC {
420    type Writer = W;
421}
422#[doc = "`reset()` method sets INTEN to value 0"]
423impl crate::Resettable for INTEN_SPEC {
424    #[inline(always)]
425    fn reset_value() -> Self::Ux {
426        0
427    }
428}
nrf5340_app_pac/fpu_ns/inten.rs

nrf5340_app_pac/fpu_ns/
inten.rs
