nrf5340_app_pac/cache_s/profiling/
dmiss.rs

1#[doc = "Register `DMISS` reader"]
2pub struct R(crate::R<DMISS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMISS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMISS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMISS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `MISSES` reader - Number of data cache misses"]
17pub type MISSES_R = crate::FieldReader<u32, u32>;
18impl R {
19    #[doc = "Bits 0:31 - Number of data cache misses"]
20    #[inline(always)]
21    pub fn misses(&self) -> MISSES_R {
22        MISSES_R::new(self.bits)
23    }
24}
25#[doc = "Description cluster: Data fetch cache miss counter for cache region n, where n=0 means Flash and n=1 means XIP.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmiss](index.html) module"]
26pub struct DMISS_SPEC;
27impl crate::RegisterSpec for DMISS_SPEC {
28    type Ux = u32;
29}
30#[doc = "`read()` method returns [dmiss::R](R) reader structure"]
31impl crate::Readable for DMISS_SPEC {
32    type Reader = R;
33}
34#[doc = "`reset()` method sets DMISS to value 0"]
35impl crate::Resettable for DMISS_SPEC {
36    #[inline(always)]
37    fn reset_value() -> Self::Ux {
38        0
39    }
40}
nrf5340_app_pac/cache_s/profiling/dmiss.rs

nrf5340_app_pac/cache_s/profiling/
dmiss.rs
