nrf5340_app_pac/fpu_ns/
intenclr.rs

1#[doc = "Register `INTENCLR` reader"]
2pub struct R(crate::R<INTENCLR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTENCLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTENCLR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTENCLR` writer"]
17pub struct W(crate::W<INTENCLR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTENCLR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTENCLR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `INVALIDOPERATION` reader - Write '1' to disable interrupt for event INVALIDOPERATION"]
38pub type INVALIDOPERATION_R = crate::BitReader<INVALIDOPERATION_A>;
39#[doc = "Write '1' to disable interrupt for event INVALIDOPERATION\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41pub enum INVALIDOPERATION_A {
42    #[doc = "0: Read: Disabled"]
43    DISABLED = 0,
44    #[doc = "1: Read: Enabled"]
45    ENABLED = 1,
46}
47impl From<INVALIDOPERATION_A> for bool {
48    #[inline(always)]
49    fn from(variant: INVALIDOPERATION_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl INVALIDOPERATION_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> INVALIDOPERATION_A {
57        match self.bits {
58            false => INVALIDOPERATION_A::DISABLED,
59            true => INVALIDOPERATION_A::ENABLED,
60        }
61    }
62    #[doc = "Checks if the value of the field is `DISABLED`"]
63    #[inline(always)]
64    pub fn is_disabled(&self) -> bool {
65        *self == INVALIDOPERATION_A::DISABLED
66    }
67    #[doc = "Checks if the value of the field is `ENABLED`"]
68    #[inline(always)]
69    pub fn is_enabled(&self) -> bool {
70        *self == INVALIDOPERATION_A::ENABLED
71    }
72}
73#[doc = "Write '1' to disable interrupt for event INVALIDOPERATION\n\nValue on reset: 0"]
74#[derive(Clone, Copy, Debug, PartialEq)]
75pub enum INVALIDOPERATION_AW {
76    #[doc = "1: Disable"]
77    CLEAR = 1,
78}
79impl From<INVALIDOPERATION_AW> for bool {
80    #[inline(always)]
81    fn from(variant: INVALIDOPERATION_AW) -> Self {
82        variant as u8 != 0
83    }
84}
85#[doc = "Field `INVALIDOPERATION` writer - Write '1' to disable interrupt for event INVALIDOPERATION"]
86pub type INVALIDOPERATION_W<'a, const O: u8> =
87    crate::BitWriter<'a, u32, INTENCLR_SPEC, INVALIDOPERATION_AW, O>;
88impl<'a, const O: u8> INVALIDOPERATION_W<'a, O> {
89    #[doc = "Disable"]
90    #[inline(always)]
91    pub fn clear(self) -> &'a mut W {
92        self.variant(INVALIDOPERATION_AW::CLEAR)
93    }
94}
95#[doc = "Field `DIVIDEBYZERO` reader - Write '1' to disable interrupt for event DIVIDEBYZERO"]
96pub type DIVIDEBYZERO_R = crate::BitReader<DIVIDEBYZERO_A>;
97#[doc = "Write '1' to disable interrupt for event DIVIDEBYZERO\n\nValue on reset: 0"]
98#[derive(Clone, Copy, Debug, PartialEq)]
99pub enum DIVIDEBYZERO_A {
100    #[doc = "0: Read: Disabled"]
101    DISABLED = 0,
102    #[doc = "1: Read: Enabled"]
103    ENABLED = 1,
104}
105impl From<DIVIDEBYZERO_A> for bool {
106    #[inline(always)]
107    fn from(variant: DIVIDEBYZERO_A) -> Self {
108        variant as u8 != 0
109    }
110}
111impl DIVIDEBYZERO_R {
112    #[doc = "Get enumerated values variant"]
113    #[inline(always)]
114    pub fn variant(&self) -> DIVIDEBYZERO_A {
115        match self.bits {
116            false => DIVIDEBYZERO_A::DISABLED,
117            true => DIVIDEBYZERO_A::ENABLED,
118        }
119    }
120    #[doc = "Checks if the value of the field is `DISABLED`"]
121    #[inline(always)]
122    pub fn is_disabled(&self) -> bool {
123        *self == DIVIDEBYZERO_A::DISABLED
124    }
125    #[doc = "Checks if the value of the field is `ENABLED`"]
126    #[inline(always)]
127    pub fn is_enabled(&self) -> bool {
128        *self == DIVIDEBYZERO_A::ENABLED
129    }
130}
131#[doc = "Write '1' to disable interrupt for event DIVIDEBYZERO\n\nValue on reset: 0"]
132#[derive(Clone, Copy, Debug, PartialEq)]
133pub enum DIVIDEBYZERO_AW {
134    #[doc = "1: Disable"]
135    CLEAR = 1,
136}
137impl From<DIVIDEBYZERO_AW> for bool {
138    #[inline(always)]
139    fn from(variant: DIVIDEBYZERO_AW) -> Self {
140        variant as u8 != 0
141    }
142}
143#[doc = "Field `DIVIDEBYZERO` writer - Write '1' to disable interrupt for event DIVIDEBYZERO"]
144pub type DIVIDEBYZERO_W<'a, const O: u8> =
145    crate::BitWriter<'a, u32, INTENCLR_SPEC, DIVIDEBYZERO_AW, O>;
146impl<'a, const O: u8> DIVIDEBYZERO_W<'a, O> {
147    #[doc = "Disable"]
148    #[inline(always)]
149    pub fn clear(self) -> &'a mut W {
150        self.variant(DIVIDEBYZERO_AW::CLEAR)
151    }
152}
153#[doc = "Field `OVERFLOW` reader - Write '1' to disable interrupt for event OVERFLOW"]
154pub type OVERFLOW_R = crate::BitReader<OVERFLOW_A>;
155#[doc = "Write '1' to disable interrupt for event OVERFLOW\n\nValue on reset: 0"]
156#[derive(Clone, Copy, Debug, PartialEq)]
157pub enum OVERFLOW_A {
158    #[doc = "0: Read: Disabled"]
159    DISABLED = 0,
160    #[doc = "1: Read: Enabled"]
161    ENABLED = 1,
162}
163impl From<OVERFLOW_A> for bool {
164    #[inline(always)]
165    fn from(variant: OVERFLOW_A) -> Self {
166        variant as u8 != 0
167    }
168}
169impl OVERFLOW_R {
170    #[doc = "Get enumerated values variant"]
171    #[inline(always)]
172    pub fn variant(&self) -> OVERFLOW_A {
173        match self.bits {
174            false => OVERFLOW_A::DISABLED,
175            true => OVERFLOW_A::ENABLED,
176        }
177    }
178    #[doc = "Checks if the value of the field is `DISABLED`"]
179    #[inline(always)]
180    pub fn is_disabled(&self) -> bool {
181        *self == OVERFLOW_A::DISABLED
182    }
183    #[doc = "Checks if the value of the field is `ENABLED`"]
184    #[inline(always)]
185    pub fn is_enabled(&self) -> bool {
186        *self == OVERFLOW_A::ENABLED
187    }
188}
189#[doc = "Write '1' to disable interrupt for event OVERFLOW\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq)]
191pub enum OVERFLOW_AW {
192    #[doc = "1: Disable"]
193    CLEAR = 1,
194}
195impl From<OVERFLOW_AW> for bool {
196    #[inline(always)]
197    fn from(variant: OVERFLOW_AW) -> Self {
198        variant as u8 != 0
199    }
200}
201#[doc = "Field `OVERFLOW` writer - Write '1' to disable interrupt for event OVERFLOW"]
202pub type OVERFLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, OVERFLOW_AW, O>;
203impl<'a, const O: u8> OVERFLOW_W<'a, O> {
204    #[doc = "Disable"]
205    #[inline(always)]
206    pub fn clear(self) -> &'a mut W {
207        self.variant(OVERFLOW_AW::CLEAR)
208    }
209}
210#[doc = "Field `UNDERFLOW` reader - Write '1' to disable interrupt for event UNDERFLOW"]
211pub type UNDERFLOW_R = crate::BitReader<UNDERFLOW_A>;
212#[doc = "Write '1' to disable interrupt for event UNDERFLOW\n\nValue on reset: 0"]
213#[derive(Clone, Copy, Debug, PartialEq)]
214pub enum UNDERFLOW_A {
215    #[doc = "0: Read: Disabled"]
216    DISABLED = 0,
217    #[doc = "1: Read: Enabled"]
218    ENABLED = 1,
219}
220impl From<UNDERFLOW_A> for bool {
221    #[inline(always)]
222    fn from(variant: UNDERFLOW_A) -> Self {
223        variant as u8 != 0
224    }
225}
226impl UNDERFLOW_R {
227    #[doc = "Get enumerated values variant"]
228    #[inline(always)]
229    pub fn variant(&self) -> UNDERFLOW_A {
230        match self.bits {
231            false => UNDERFLOW_A::DISABLED,
232            true => UNDERFLOW_A::ENABLED,
233        }
234    }
235    #[doc = "Checks if the value of the field is `DISABLED`"]
236    #[inline(always)]
237    pub fn is_disabled(&self) -> bool {
238        *self == UNDERFLOW_A::DISABLED
239    }
240    #[doc = "Checks if the value of the field is `ENABLED`"]
241    #[inline(always)]
242    pub fn is_enabled(&self) -> bool {
243        *self == UNDERFLOW_A::ENABLED
244    }
245}
246#[doc = "Write '1' to disable interrupt for event UNDERFLOW\n\nValue on reset: 0"]
247#[derive(Clone, Copy, Debug, PartialEq)]
248pub enum UNDERFLOW_AW {
249    #[doc = "1: Disable"]
250    CLEAR = 1,
251}
252impl From<UNDERFLOW_AW> for bool {
253    #[inline(always)]
254    fn from(variant: UNDERFLOW_AW) -> Self {
255        variant as u8 != 0
256    }
257}
258#[doc = "Field `UNDERFLOW` writer - Write '1' to disable interrupt for event UNDERFLOW"]
259pub type UNDERFLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, UNDERFLOW_AW, O>;
260impl<'a, const O: u8> UNDERFLOW_W<'a, O> {
261    #[doc = "Disable"]
262    #[inline(always)]
263    pub fn clear(self) -> &'a mut W {
264        self.variant(UNDERFLOW_AW::CLEAR)
265    }
266}
267#[doc = "Field `INEXACT` reader - Write '1' to disable interrupt for event INEXACT"]
268pub type INEXACT_R = crate::BitReader<INEXACT_A>;
269#[doc = "Write '1' to disable interrupt for event INEXACT\n\nValue on reset: 0"]
270#[derive(Clone, Copy, Debug, PartialEq)]
271pub enum INEXACT_A {
272    #[doc = "0: Read: Disabled"]
273    DISABLED = 0,
274    #[doc = "1: Read: Enabled"]
275    ENABLED = 1,
276}
277impl From<INEXACT_A> for bool {
278    #[inline(always)]
279    fn from(variant: INEXACT_A) -> Self {
280        variant as u8 != 0
281    }
282}
283impl INEXACT_R {
284    #[doc = "Get enumerated values variant"]
285    #[inline(always)]
286    pub fn variant(&self) -> INEXACT_A {
287        match self.bits {
288            false => INEXACT_A::DISABLED,
289            true => INEXACT_A::ENABLED,
290        }
291    }
292    #[doc = "Checks if the value of the field is `DISABLED`"]
293    #[inline(always)]
294    pub fn is_disabled(&self) -> bool {
295        *self == INEXACT_A::DISABLED
296    }
297    #[doc = "Checks if the value of the field is `ENABLED`"]
298    #[inline(always)]
299    pub fn is_enabled(&self) -> bool {
300        *self == INEXACT_A::ENABLED
301    }
302}
303#[doc = "Write '1' to disable interrupt for event INEXACT\n\nValue on reset: 0"]
304#[derive(Clone, Copy, Debug, PartialEq)]
305pub enum INEXACT_AW {
306    #[doc = "1: Disable"]
307    CLEAR = 1,
308}
309impl From<INEXACT_AW> for bool {
310    #[inline(always)]
311    fn from(variant: INEXACT_AW) -> Self {
312        variant as u8 != 0
313    }
314}
315#[doc = "Field `INEXACT` writer - Write '1' to disable interrupt for event INEXACT"]
316pub type INEXACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, INEXACT_AW, O>;
317impl<'a, const O: u8> INEXACT_W<'a, O> {
318    #[doc = "Disable"]
319    #[inline(always)]
320    pub fn clear(self) -> &'a mut W {
321        self.variant(INEXACT_AW::CLEAR)
322    }
323}
324#[doc = "Field `DENORMALINPUT` reader - Write '1' to disable interrupt for event DENORMALINPUT"]
325pub type DENORMALINPUT_R = crate::BitReader<DENORMALINPUT_A>;
326#[doc = "Write '1' to disable interrupt for event DENORMALINPUT\n\nValue on reset: 0"]
327#[derive(Clone, Copy, Debug, PartialEq)]
328pub enum DENORMALINPUT_A {
329    #[doc = "0: Read: Disabled"]
330    DISABLED = 0,
331    #[doc = "1: Read: Enabled"]
332    ENABLED = 1,
333}
334impl From<DENORMALINPUT_A> for bool {
335    #[inline(always)]
336    fn from(variant: DENORMALINPUT_A) -> Self {
337        variant as u8 != 0
338    }
339}
340impl DENORMALINPUT_R {
341    #[doc = "Get enumerated values variant"]
342    #[inline(always)]
343    pub fn variant(&self) -> DENORMALINPUT_A {
344        match self.bits {
345            false => DENORMALINPUT_A::DISABLED,
346            true => DENORMALINPUT_A::ENABLED,
347        }
348    }
349    #[doc = "Checks if the value of the field is `DISABLED`"]
350    #[inline(always)]
351    pub fn is_disabled(&self) -> bool {
352        *self == DENORMALINPUT_A::DISABLED
353    }
354    #[doc = "Checks if the value of the field is `ENABLED`"]
355    #[inline(always)]
356    pub fn is_enabled(&self) -> bool {
357        *self == DENORMALINPUT_A::ENABLED
358    }
359}
360#[doc = "Write '1' to disable interrupt for event DENORMALINPUT\n\nValue on reset: 0"]
361#[derive(Clone, Copy, Debug, PartialEq)]
362pub enum DENORMALINPUT_AW {
363    #[doc = "1: Disable"]
364    CLEAR = 1,
365}
366impl From<DENORMALINPUT_AW> for bool {
367    #[inline(always)]
368    fn from(variant: DENORMALINPUT_AW) -> Self {
369        variant as u8 != 0
370    }
371}
372#[doc = "Field `DENORMALINPUT` writer - Write '1' to disable interrupt for event DENORMALINPUT"]
373pub type DENORMALINPUT_W<'a, const O: u8> =
374    crate::BitWriter<'a, u32, INTENCLR_SPEC, DENORMALINPUT_AW, O>;
375impl<'a, const O: u8> DENORMALINPUT_W<'a, O> {
376    #[doc = "Disable"]
377    #[inline(always)]
378    pub fn clear(self) -> &'a mut W {
379        self.variant(DENORMALINPUT_AW::CLEAR)
380    }
381}
382impl R {
383    #[doc = "Bit 0 - Write '1' to disable interrupt for event INVALIDOPERATION"]
384    #[inline(always)]
385    pub fn invalidoperation(&self) -> INVALIDOPERATION_R {
386        INVALIDOPERATION_R::new((self.bits & 1) != 0)
387    }
388    #[doc = "Bit 1 - Write '1' to disable interrupt for event DIVIDEBYZERO"]
389    #[inline(always)]
390    pub fn dividebyzero(&self) -> DIVIDEBYZERO_R {
391        DIVIDEBYZERO_R::new(((self.bits >> 1) & 1) != 0)
392    }
393    #[doc = "Bit 2 - Write '1' to disable interrupt for event OVERFLOW"]
394    #[inline(always)]
395    pub fn overflow(&self) -> OVERFLOW_R {
396        OVERFLOW_R::new(((self.bits >> 2) & 1) != 0)
397    }
398    #[doc = "Bit 3 - Write '1' to disable interrupt for event UNDERFLOW"]
399    #[inline(always)]
400    pub fn underflow(&self) -> UNDERFLOW_R {
401        UNDERFLOW_R::new(((self.bits >> 3) & 1) != 0)
402    }
403    #[doc = "Bit 4 - Write '1' to disable interrupt for event INEXACT"]
404    #[inline(always)]
405    pub fn inexact(&self) -> INEXACT_R {
406        INEXACT_R::new(((self.bits >> 4) & 1) != 0)
407    }
408    #[doc = "Bit 5 - Write '1' to disable interrupt for event DENORMALINPUT"]
409    #[inline(always)]
410    pub fn denormalinput(&self) -> DENORMALINPUT_R {
411        DENORMALINPUT_R::new(((self.bits >> 5) & 1) != 0)
412    }
413}
414impl W {
415    #[doc = "Bit 0 - Write '1' to disable interrupt for event INVALIDOPERATION"]
416    #[inline(always)]
417    pub fn invalidoperation(&mut self) -> INVALIDOPERATION_W<0> {
418        INVALIDOPERATION_W::new(self)
419    }
420    #[doc = "Bit 1 - Write '1' to disable interrupt for event DIVIDEBYZERO"]
421    #[inline(always)]
422    pub fn dividebyzero(&mut self) -> DIVIDEBYZERO_W<1> {
423        DIVIDEBYZERO_W::new(self)
424    }
425    #[doc = "Bit 2 - Write '1' to disable interrupt for event OVERFLOW"]
426    #[inline(always)]
427    pub fn overflow(&mut self) -> OVERFLOW_W<2> {
428        OVERFLOW_W::new(self)
429    }
430    #[doc = "Bit 3 - Write '1' to disable interrupt for event UNDERFLOW"]
431    #[inline(always)]
432    pub fn underflow(&mut self) -> UNDERFLOW_W<3> {
433        UNDERFLOW_W::new(self)
434    }
435    #[doc = "Bit 4 - Write '1' to disable interrupt for event INEXACT"]
436    #[inline(always)]
437    pub fn inexact(&mut self) -> INEXACT_W<4> {
438        INEXACT_W::new(self)
439    }
440    #[doc = "Bit 5 - Write '1' to disable interrupt for event DENORMALINPUT"]
441    #[inline(always)]
442    pub fn denormalinput(&mut self) -> DENORMALINPUT_W<5> {
443        DENORMALINPUT_W::new(self)
444    }
445    #[doc = "Writes raw bits to the register."]
446    #[inline(always)]
447    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
448        self.0.bits(bits);
449        self
450    }
451}
452#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
453pub struct INTENCLR_SPEC;
454impl crate::RegisterSpec for INTENCLR_SPEC {
455    type Ux = u32;
456}
457#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
458impl crate::Readable for INTENCLR_SPEC {
459    type Reader = R;
460}
461#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
462impl crate::Writable for INTENCLR_SPEC {
463    type Writer = W;
464}
465#[doc = "`reset()` method sets INTENCLR to value 0"]
466impl crate::Resettable for INTENCLR_SPEC {
467    #[inline(always)]
468    fn reset_value() -> Self::Ux {
469        0
470    }
471}
nrf5340_app_pac/fpu_ns/intenclr.rs

nrf5340_app_pac/fpu_ns/
intenclr.rs
