nrf5340_app_pac/p0_ns/
pin_cnf.rs

1#[doc = "Register `PIN_CNF[%s]` reader"]
2pub struct R(crate::R<PIN_CNF_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PIN_CNF_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PIN_CNF_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PIN_CNF_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PIN_CNF[%s]` writer"]
17pub struct W(crate::W<PIN_CNF_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PIN_CNF_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PIN_CNF_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PIN_CNF_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DIR` reader - Pin direction. Same physical register as DIR register"]
38pub type DIR_R = crate::BitReader<DIR_A>;
39#[doc = "Pin direction. Same physical register as DIR register\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41pub enum DIR_A {
42    #[doc = "0: Configure pin as an input pin"]
43    INPUT = 0,
44    #[doc = "1: Configure pin as an output pin"]
45    OUTPUT = 1,
46}
47impl From<DIR_A> for bool {
48    #[inline(always)]
49    fn from(variant: DIR_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl DIR_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> DIR_A {
57        match self.bits {
58            false => DIR_A::INPUT,
59            true => DIR_A::OUTPUT,
60        }
61    }
62    #[doc = "Checks if the value of the field is `INPUT`"]
63    #[inline(always)]
64    pub fn is_input(&self) -> bool {
65        *self == DIR_A::INPUT
66    }
67    #[doc = "Checks if the value of the field is `OUTPUT`"]
68    #[inline(always)]
69    pub fn is_output(&self) -> bool {
70        *self == DIR_A::OUTPUT
71    }
72}
73#[doc = "Field `DIR` writer - Pin direction. Same physical register as DIR register"]
74pub type DIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PIN_CNF_SPEC, DIR_A, O>;
75impl<'a, const O: u8> DIR_W<'a, O> {
76    #[doc = "Configure pin as an input pin"]
77    #[inline(always)]
78    pub fn input(self) -> &'a mut W {
79        self.variant(DIR_A::INPUT)
80    }
81    #[doc = "Configure pin as an output pin"]
82    #[inline(always)]
83    pub fn output(self) -> &'a mut W {
84        self.variant(DIR_A::OUTPUT)
85    }
86}
87#[doc = "Field `INPUT` reader - Connect or disconnect input buffer"]
88pub type INPUT_R = crate::BitReader<INPUT_A>;
89#[doc = "Connect or disconnect input buffer\n\nValue on reset: 1"]
90#[derive(Clone, Copy, Debug, PartialEq)]
91pub enum INPUT_A {
92    #[doc = "0: Connect input buffer"]
93    CONNECT = 0,
94    #[doc = "1: Disconnect input buffer"]
95    DISCONNECT = 1,
96}
97impl From<INPUT_A> for bool {
98    #[inline(always)]
99    fn from(variant: INPUT_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl INPUT_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> INPUT_A {
107        match self.bits {
108            false => INPUT_A::CONNECT,
109            true => INPUT_A::DISCONNECT,
110        }
111    }
112    #[doc = "Checks if the value of the field is `CONNECT`"]
113    #[inline(always)]
114    pub fn is_connect(&self) -> bool {
115        *self == INPUT_A::CONNECT
116    }
117    #[doc = "Checks if the value of the field is `DISCONNECT`"]
118    #[inline(always)]
119    pub fn is_disconnect(&self) -> bool {
120        *self == INPUT_A::DISCONNECT
121    }
122}
123#[doc = "Field `INPUT` writer - Connect or disconnect input buffer"]
124pub type INPUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PIN_CNF_SPEC, INPUT_A, O>;
125impl<'a, const O: u8> INPUT_W<'a, O> {
126    #[doc = "Connect input buffer"]
127    #[inline(always)]
128    pub fn connect(self) -> &'a mut W {
129        self.variant(INPUT_A::CONNECT)
130    }
131    #[doc = "Disconnect input buffer"]
132    #[inline(always)]
133    pub fn disconnect(self) -> &'a mut W {
134        self.variant(INPUT_A::DISCONNECT)
135    }
136}
137#[doc = "Field `PULL` reader - Pull configuration"]
138pub type PULL_R = crate::FieldReader<u8, PULL_A>;
139#[doc = "Pull configuration\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141#[repr(u8)]
142pub enum PULL_A {
143    #[doc = "0: No pull"]
144    DISABLED = 0,
145    #[doc = "1: Pull down on pin"]
146    PULLDOWN = 1,
147    #[doc = "3: Pull up on pin"]
148    PULLUP = 3,
149}
150impl From<PULL_A> for u8 {
151    #[inline(always)]
152    fn from(variant: PULL_A) -> Self {
153        variant as _
154    }
155}
156impl PULL_R {
157    #[doc = "Get enumerated values variant"]
158    #[inline(always)]
159    pub fn variant(&self) -> Option<PULL_A> {
160        match self.bits {
161            0 => Some(PULL_A::DISABLED),
162            1 => Some(PULL_A::PULLDOWN),
163            3 => Some(PULL_A::PULLUP),
164            _ => None,
165        }
166    }
167    #[doc = "Checks if the value of the field is `DISABLED`"]
168    #[inline(always)]
169    pub fn is_disabled(&self) -> bool {
170        *self == PULL_A::DISABLED
171    }
172    #[doc = "Checks if the value of the field is `PULLDOWN`"]
173    #[inline(always)]
174    pub fn is_pulldown(&self) -> bool {
175        *self == PULL_A::PULLDOWN
176    }
177    #[doc = "Checks if the value of the field is `PULLUP`"]
178    #[inline(always)]
179    pub fn is_pullup(&self) -> bool {
180        *self == PULL_A::PULLUP
181    }
182}
183#[doc = "Field `PULL` writer - Pull configuration"]
184pub type PULL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PIN_CNF_SPEC, u8, PULL_A, 2, O>;
185impl<'a, const O: u8> PULL_W<'a, O> {
186    #[doc = "No pull"]
187    #[inline(always)]
188    pub fn disabled(self) -> &'a mut W {
189        self.variant(PULL_A::DISABLED)
190    }
191    #[doc = "Pull down on pin"]
192    #[inline(always)]
193    pub fn pulldown(self) -> &'a mut W {
194        self.variant(PULL_A::PULLDOWN)
195    }
196    #[doc = "Pull up on pin"]
197    #[inline(always)]
198    pub fn pullup(self) -> &'a mut W {
199        self.variant(PULL_A::PULLUP)
200    }
201}
202#[doc = "Field `DRIVE` reader - Drive configuration"]
203pub type DRIVE_R = crate::FieldReader<u8, DRIVE_A>;
204#[doc = "Drive configuration\n\nValue on reset: 0"]
205#[derive(Clone, Copy, Debug, PartialEq)]
206#[repr(u8)]
207pub enum DRIVE_A {
208    #[doc = "0: Standard '0', standard '1'"]
209    S0S1 = 0,
210    #[doc = "1: High drive '0', standard '1'"]
211    H0S1 = 1,
212    #[doc = "2: Standard '0', high drive '1'"]
213    S0H1 = 2,
214    #[doc = "3: High drive '0', high 'drive '1''"]
215    H0H1 = 3,
216    #[doc = "4: Disconnect '0', standard '1' (normally used for wired-or connections)"]
217    D0S1 = 4,
218    #[doc = "5: Disconnect '0', high drive '1' (normally used for wired-or connections)"]
219    D0H1 = 5,
220    #[doc = "6: Standard '0', disconnect '1' (normally used for wired-and connections)"]
221    S0D1 = 6,
222    #[doc = "7: High drive '0', disconnect '1' (normally used for wired-and connections)"]
223    H0D1 = 7,
224    #[doc = "11: Extra high drive '0', extra high drive '1'"]
225    E0E1 = 11,
226}
227impl From<DRIVE_A> for u8 {
228    #[inline(always)]
229    fn from(variant: DRIVE_A) -> Self {
230        variant as _
231    }
232}
233impl DRIVE_R {
234    #[doc = "Get enumerated values variant"]
235    #[inline(always)]
236    pub fn variant(&self) -> Option<DRIVE_A> {
237        match self.bits {
238            0 => Some(DRIVE_A::S0S1),
239            1 => Some(DRIVE_A::H0S1),
240            2 => Some(DRIVE_A::S0H1),
241            3 => Some(DRIVE_A::H0H1),
242            4 => Some(DRIVE_A::D0S1),
243            5 => Some(DRIVE_A::D0H1),
244            6 => Some(DRIVE_A::S0D1),
245            7 => Some(DRIVE_A::H0D1),
246            11 => Some(DRIVE_A::E0E1),
247            _ => None,
248        }
249    }
250    #[doc = "Checks if the value of the field is `S0S1`"]
251    #[inline(always)]
252    pub fn is_s0s1(&self) -> bool {
253        *self == DRIVE_A::S0S1
254    }
255    #[doc = "Checks if the value of the field is `H0S1`"]
256    #[inline(always)]
257    pub fn is_h0s1(&self) -> bool {
258        *self == DRIVE_A::H0S1
259    }
260    #[doc = "Checks if the value of the field is `S0H1`"]
261    #[inline(always)]
262    pub fn is_s0h1(&self) -> bool {
263        *self == DRIVE_A::S0H1
264    }
265    #[doc = "Checks if the value of the field is `H0H1`"]
266    #[inline(always)]
267    pub fn is_h0h1(&self) -> bool {
268        *self == DRIVE_A::H0H1
269    }
270    #[doc = "Checks if the value of the field is `D0S1`"]
271    #[inline(always)]
272    pub fn is_d0s1(&self) -> bool {
273        *self == DRIVE_A::D0S1
274    }
275    #[doc = "Checks if the value of the field is `D0H1`"]
276    #[inline(always)]
277    pub fn is_d0h1(&self) -> bool {
278        *self == DRIVE_A::D0H1
279    }
280    #[doc = "Checks if the value of the field is `S0D1`"]
281    #[inline(always)]
282    pub fn is_s0d1(&self) -> bool {
283        *self == DRIVE_A::S0D1
284    }
285    #[doc = "Checks if the value of the field is `H0D1`"]
286    #[inline(always)]
287    pub fn is_h0d1(&self) -> bool {
288        *self == DRIVE_A::H0D1
289    }
290    #[doc = "Checks if the value of the field is `E0E1`"]
291    #[inline(always)]
292    pub fn is_e0e1(&self) -> bool {
293        *self == DRIVE_A::E0E1
294    }
295}
296#[doc = "Field `DRIVE` writer - Drive configuration"]
297pub type DRIVE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PIN_CNF_SPEC, u8, DRIVE_A, 4, O>;
298impl<'a, const O: u8> DRIVE_W<'a, O> {
299    #[doc = "Standard '0', standard '1'"]
300    #[inline(always)]
301    pub fn s0s1(self) -> &'a mut W {
302        self.variant(DRIVE_A::S0S1)
303    }
304    #[doc = "High drive '0', standard '1'"]
305    #[inline(always)]
306    pub fn h0s1(self) -> &'a mut W {
307        self.variant(DRIVE_A::H0S1)
308    }
309    #[doc = "Standard '0', high drive '1'"]
310    #[inline(always)]
311    pub fn s0h1(self) -> &'a mut W {
312        self.variant(DRIVE_A::S0H1)
313    }
314    #[doc = "High drive '0', high 'drive '1''"]
315    #[inline(always)]
316    pub fn h0h1(self) -> &'a mut W {
317        self.variant(DRIVE_A::H0H1)
318    }
319    #[doc = "Disconnect '0', standard '1' (normally used for wired-or connections)"]
320    #[inline(always)]
321    pub fn d0s1(self) -> &'a mut W {
322        self.variant(DRIVE_A::D0S1)
323    }
324    #[doc = "Disconnect '0', high drive '1' (normally used for wired-or connections)"]
325    #[inline(always)]
326    pub fn d0h1(self) -> &'a mut W {
327        self.variant(DRIVE_A::D0H1)
328    }
329    #[doc = "Standard '0', disconnect '1' (normally used for wired-and connections)"]
330    #[inline(always)]
331    pub fn s0d1(self) -> &'a mut W {
332        self.variant(DRIVE_A::S0D1)
333    }
334    #[doc = "High drive '0', disconnect '1' (normally used for wired-and connections)"]
335    #[inline(always)]
336    pub fn h0d1(self) -> &'a mut W {
337        self.variant(DRIVE_A::H0D1)
338    }
339    #[doc = "Extra high drive '0', extra high drive '1'"]
340    #[inline(always)]
341    pub fn e0e1(self) -> &'a mut W {
342        self.variant(DRIVE_A::E0E1)
343    }
344}
345#[doc = "Field `SENSE` reader - Pin sensing mechanism"]
346pub type SENSE_R = crate::FieldReader<u8, SENSE_A>;
347#[doc = "Pin sensing mechanism\n\nValue on reset: 0"]
348#[derive(Clone, Copy, Debug, PartialEq)]
349#[repr(u8)]
350pub enum SENSE_A {
351    #[doc = "0: Disabled"]
352    DISABLED = 0,
353    #[doc = "2: Sense for high level"]
354    HIGH = 2,
355    #[doc = "3: Sense for low level"]
356    LOW = 3,
357}
358impl From<SENSE_A> for u8 {
359    #[inline(always)]
360    fn from(variant: SENSE_A) -> Self {
361        variant as _
362    }
363}
364impl SENSE_R {
365    #[doc = "Get enumerated values variant"]
366    #[inline(always)]
367    pub fn variant(&self) -> Option<SENSE_A> {
368        match self.bits {
369            0 => Some(SENSE_A::DISABLED),
370            2 => Some(SENSE_A::HIGH),
371            3 => Some(SENSE_A::LOW),
372            _ => None,
373        }
374    }
375    #[doc = "Checks if the value of the field is `DISABLED`"]
376    #[inline(always)]
377    pub fn is_disabled(&self) -> bool {
378        *self == SENSE_A::DISABLED
379    }
380    #[doc = "Checks if the value of the field is `HIGH`"]
381    #[inline(always)]
382    pub fn is_high(&self) -> bool {
383        *self == SENSE_A::HIGH
384    }
385    #[doc = "Checks if the value of the field is `LOW`"]
386    #[inline(always)]
387    pub fn is_low(&self) -> bool {
388        *self == SENSE_A::LOW
389    }
390}
391#[doc = "Field `SENSE` writer - Pin sensing mechanism"]
392pub type SENSE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PIN_CNF_SPEC, u8, SENSE_A, 2, O>;
393impl<'a, const O: u8> SENSE_W<'a, O> {
394    #[doc = "Disabled"]
395    #[inline(always)]
396    pub fn disabled(self) -> &'a mut W {
397        self.variant(SENSE_A::DISABLED)
398    }
399    #[doc = "Sense for high level"]
400    #[inline(always)]
401    pub fn high(self) -> &'a mut W {
402        self.variant(SENSE_A::HIGH)
403    }
404    #[doc = "Sense for low level"]
405    #[inline(always)]
406    pub fn low(self) -> &'a mut W {
407        self.variant(SENSE_A::LOW)
408    }
409}
410#[doc = "Field `MCUSEL` reader - Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code."]
411pub type MCUSEL_R = crate::FieldReader<u8, MCUSEL_A>;
412#[doc = "Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code.\n\nValue on reset: 0"]
413#[derive(Clone, Copy, Debug, PartialEq)]
414#[repr(u8)]
415pub enum MCUSEL_A {
416    #[doc = "0: Application MCU"]
417    APP_MCU = 0,
418    #[doc = "1: Network MCU"]
419    NETWORK_MCU = 1,
420    #[doc = "3: Peripheral with dedicated pins"]
421    PERIPHERAL = 3,
422    #[doc = "7: Trace and Debug Subsystem"]
423    TND = 7,
424}
425impl From<MCUSEL_A> for u8 {
426    #[inline(always)]
427    fn from(variant: MCUSEL_A) -> Self {
428        variant as _
429    }
430}
431impl MCUSEL_R {
432    #[doc = "Get enumerated values variant"]
433    #[inline(always)]
434    pub fn variant(&self) -> Option<MCUSEL_A> {
435        match self.bits {
436            0 => Some(MCUSEL_A::APP_MCU),
437            1 => Some(MCUSEL_A::NETWORK_MCU),
438            3 => Some(MCUSEL_A::PERIPHERAL),
439            7 => Some(MCUSEL_A::TND),
440            _ => None,
441        }
442    }
443    #[doc = "Checks if the value of the field is `APP_MCU`"]
444    #[inline(always)]
445    pub fn is_app_mcu(&self) -> bool {
446        *self == MCUSEL_A::APP_MCU
447    }
448    #[doc = "Checks if the value of the field is `NETWORK_MCU`"]
449    #[inline(always)]
450    pub fn is_network_mcu(&self) -> bool {
451        *self == MCUSEL_A::NETWORK_MCU
452    }
453    #[doc = "Checks if the value of the field is `PERIPHERAL`"]
454    #[inline(always)]
455    pub fn is_peripheral(&self) -> bool {
456        *self == MCUSEL_A::PERIPHERAL
457    }
458    #[doc = "Checks if the value of the field is `TND`"]
459    #[inline(always)]
460    pub fn is_tnd(&self) -> bool {
461        *self == MCUSEL_A::TND
462    }
463}
464#[doc = "Field `MCUSEL` writer - Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code."]
465pub type MCUSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PIN_CNF_SPEC, u8, MCUSEL_A, 3, O>;
466impl<'a, const O: u8> MCUSEL_W<'a, O> {
467    #[doc = "Application MCU"]
468    #[inline(always)]
469    pub fn app_mcu(self) -> &'a mut W {
470        self.variant(MCUSEL_A::APP_MCU)
471    }
472    #[doc = "Network MCU"]
473    #[inline(always)]
474    pub fn network_mcu(self) -> &'a mut W {
475        self.variant(MCUSEL_A::NETWORK_MCU)
476    }
477    #[doc = "Peripheral with dedicated pins"]
478    #[inline(always)]
479    pub fn peripheral(self) -> &'a mut W {
480        self.variant(MCUSEL_A::PERIPHERAL)
481    }
482    #[doc = "Trace and Debug Subsystem"]
483    #[inline(always)]
484    pub fn tnd(self) -> &'a mut W {
485        self.variant(MCUSEL_A::TND)
486    }
487}
488impl R {
489    #[doc = "Bit 0 - Pin direction. Same physical register as DIR register"]
490    #[inline(always)]
491    pub fn dir(&self) -> DIR_R {
492        DIR_R::new((self.bits & 1) != 0)
493    }
494    #[doc = "Bit 1 - Connect or disconnect input buffer"]
495    #[inline(always)]
496    pub fn input(&self) -> INPUT_R {
497        INPUT_R::new(((self.bits >> 1) & 1) != 0)
498    }
499    #[doc = "Bits 2:3 - Pull configuration"]
500    #[inline(always)]
501    pub fn pull(&self) -> PULL_R {
502        PULL_R::new(((self.bits >> 2) & 3) as u8)
503    }
504    #[doc = "Bits 8:11 - Drive configuration"]
505    #[inline(always)]
506    pub fn drive(&self) -> DRIVE_R {
507        DRIVE_R::new(((self.bits >> 8) & 0x0f) as u8)
508    }
509    #[doc = "Bits 16:17 - Pin sensing mechanism"]
510    #[inline(always)]
511    pub fn sense(&self) -> SENSE_R {
512        SENSE_R::new(((self.bits >> 16) & 3) as u8)
513    }
514    #[doc = "Bits 28:30 - Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code."]
515    #[inline(always)]
516    pub fn mcusel(&self) -> MCUSEL_R {
517        MCUSEL_R::new(((self.bits >> 28) & 7) as u8)
518    }
519}
520impl W {
521    #[doc = "Bit 0 - Pin direction. Same physical register as DIR register"]
522    #[inline(always)]
523    pub fn dir(&mut self) -> DIR_W<0> {
524        DIR_W::new(self)
525    }
526    #[doc = "Bit 1 - Connect or disconnect input buffer"]
527    #[inline(always)]
528    pub fn input(&mut self) -> INPUT_W<1> {
529        INPUT_W::new(self)
530    }
531    #[doc = "Bits 2:3 - Pull configuration"]
532    #[inline(always)]
533    pub fn pull(&mut self) -> PULL_W<2> {
534        PULL_W::new(self)
535    }
536    #[doc = "Bits 8:11 - Drive configuration"]
537    #[inline(always)]
538    pub fn drive(&mut self) -> DRIVE_W<8> {
539        DRIVE_W::new(self)
540    }
541    #[doc = "Bits 16:17 - Pin sensing mechanism"]
542    #[inline(always)]
543    pub fn sense(&mut self) -> SENSE_W<16> {
544        SENSE_W::new(self)
545    }
546    #[doc = "Bits 28:30 - Select which MCU/Subsystem controls this pin Note: this field is only accessible from secure code."]
547    #[inline(always)]
548    pub fn mcusel(&mut self) -> MCUSEL_W<28> {
549        MCUSEL_W::new(self)
550    }
551    #[doc = "Writes raw bits to the register."]
552    #[inline(always)]
553    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
554        self.0.bits(bits);
555        self
556    }
557}
558#[doc = "Description collection: Configuration of GPIO pins\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pin_cnf](index.html) module"]
559pub struct PIN_CNF_SPEC;
560impl crate::RegisterSpec for PIN_CNF_SPEC {
561    type Ux = u32;
562}
563#[doc = "`read()` method returns [pin_cnf::R](R) reader structure"]
564impl crate::Readable for PIN_CNF_SPEC {
565    type Reader = R;
566}
567#[doc = "`write(|w| ..)` method takes [pin_cnf::W](W) writer structure"]
568impl crate::Writable for PIN_CNF_SPEC {
569    type Writer = W;
570}
571#[doc = "`reset()` method sets PIN_CNF[%s]
572to value 0x02"]
573impl crate::Resettable for PIN_CNF_SPEC {
574    #[inline(always)]
575    fn reset_value() -> Self::Ux {
576        0x02
577    }
578}
nrf5340_app_pac/p0_ns/pin_cnf.rs

nrf5340_app_pac/p0_ns/
pin_cnf.rs
