nrf5340_app_pac/clock_ns/
hfclk192mctrl.rs

1#[doc = "Register `HFCLK192MCTRL` reader"]
2pub struct R(crate::R<HFCLK192MCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HFCLK192MCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HFCLK192MCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HFCLK192MCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `HFCLK192MCTRL` writer"]
17pub struct W(crate::W<HFCLK192MCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HFCLK192MCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HFCLK192MCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HFCLK192MCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HCLK192M` reader - High frequency clock HCLK192M"]
38pub type HCLK192M_R = crate::FieldReader<u8, HCLK192M_A>;
39#[doc = "High frequency clock HCLK192M\n\nValue on reset: 2"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41#[repr(u8)]
42pub enum HCLK192M_A {
43    #[doc = "0: Divide HFCLK192M by 1"]
44    DIV1 = 0,
45    #[doc = "1: Divide HFCLK192M by 2"]
46    DIV2 = 1,
47    #[doc = "2: Divide HFCLK192M by 4"]
48    DIV4 = 2,
49}
50impl From<HCLK192M_A> for u8 {
51    #[inline(always)]
52    fn from(variant: HCLK192M_A) -> Self {
53        variant as _
54    }
55}
56impl HCLK192M_R {
57    #[doc = "Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> Option<HCLK192M_A> {
60        match self.bits {
61            0 => Some(HCLK192M_A::DIV1),
62            1 => Some(HCLK192M_A::DIV2),
63            2 => Some(HCLK192M_A::DIV4),
64            _ => None,
65        }
66    }
67    #[doc = "Checks if the value of the field is `DIV1`"]
68    #[inline(always)]
69    pub fn is_div1(&self) -> bool {
70        *self == HCLK192M_A::DIV1
71    }
72    #[doc = "Checks if the value of the field is `DIV2`"]
73    #[inline(always)]
74    pub fn is_div2(&self) -> bool {
75        *self == HCLK192M_A::DIV2
76    }
77    #[doc = "Checks if the value of the field is `DIV4`"]
78    #[inline(always)]
79    pub fn is_div4(&self) -> bool {
80        *self == HCLK192M_A::DIV4
81    }
82}
83#[doc = "Field `HCLK192M` writer - High frequency clock HCLK192M"]
84pub type HCLK192M_W<'a, const O: u8> =
85    crate::FieldWriter<'a, u32, HFCLK192MCTRL_SPEC, u8, HCLK192M_A, 2, O>;
86impl<'a, const O: u8> HCLK192M_W<'a, O> {
87    #[doc = "Divide HFCLK192M by 1"]
88    #[inline(always)]
89    pub fn div1(self) -> &'a mut W {
90        self.variant(HCLK192M_A::DIV1)
91    }
92    #[doc = "Divide HFCLK192M by 2"]
93    #[inline(always)]
94    pub fn div2(self) -> &'a mut W {
95        self.variant(HCLK192M_A::DIV2)
96    }
97    #[doc = "Divide HFCLK192M by 4"]
98    #[inline(always)]
99    pub fn div4(self) -> &'a mut W {
100        self.variant(HCLK192M_A::DIV4)
101    }
102}
103impl R {
104    #[doc = "Bits 0:1 - High frequency clock HCLK192M"]
105    #[inline(always)]
106    pub fn hclk192m(&self) -> HCLK192M_R {
107        HCLK192M_R::new((self.bits & 3) as u8)
108    }
109}
110impl W {
111    #[doc = "Bits 0:1 - High frequency clock HCLK192M"]
112    #[inline(always)]
113    pub fn hclk192m(&mut self) -> HCLK192M_W<0> {
114        HCLK192M_W::new(self)
115    }
116    #[doc = "Writes raw bits to the register."]
117    #[inline(always)]
118    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
119        self.0.bits(bits);
120        self
121    }
122}
123#[doc = "HFCLK192M frequency configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192mctrl](index.html) module"]
124pub struct HFCLK192MCTRL_SPEC;
125impl crate::RegisterSpec for HFCLK192MCTRL_SPEC {
126    type Ux = u32;
127}
128#[doc = "`read()` method returns [hfclk192mctrl::R](R) reader structure"]
129impl crate::Readable for HFCLK192MCTRL_SPEC {
130    type Reader = R;
131}
132#[doc = "`write(|w| ..)` method takes [hfclk192mctrl::W](W) writer structure"]
133impl crate::Writable for HFCLK192MCTRL_SPEC {
134    type Writer = W;
135}
136#[doc = "`reset()` method sets HFCLK192MCTRL to value 0x02"]
137impl crate::Resettable for HFCLK192MCTRL_SPEC {
138    #[inline(always)]
139    fn reset_value() -> Self::Ux {
140        0x02
141    }
142}
nrf5340_app_pac/clock_ns/hfclk192mctrl.rs

nrf5340_app_pac/clock_ns/
hfclk192mctrl.rs
