[−][src]Struct nrf5340_app_pac::twim0_ns::RegisterBlock
Register block
Fields
tasks_startrx: TASKS_STARTRX
0x00 - Start TWI receive sequence
tasks_starttx: TASKS_STARTTX
0x08 - Start TWI transmit sequence
tasks_stop: TASKS_STOP
0x14 - Stop TWI transaction. Must be issued while the TWI master is not suspended.
tasks_suspend: TASKS_SUSPEND
0x1c - Suspend TWI transaction
tasks_resume: TASKS_RESUME
0x20 - Resume TWI transaction
subscribe_startrx: SUBSCRIBE_STARTRX
0x80 - Subscribe configuration for task STARTRX
subscribe_starttx: SUBSCRIBE_STARTTX
0x88 - Subscribe configuration for task STARTTX
subscribe_stop: SUBSCRIBE_STOP
0x94 - Subscribe configuration for task STOP
subscribe_suspend: SUBSCRIBE_SUSPEND
0x9c - Subscribe configuration for task SUSPEND
subscribe_resume: SUBSCRIBE_RESUME
0xa0 - Subscribe configuration for task RESUME
events_stopped: EVENTS_STOPPED
0x104 - TWI stopped
events_error: EVENTS_ERROR
0x124 - TWI error
events_suspended: EVENTS_SUSPENDED
0x148 - Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.
events_rxstarted: EVENTS_RXSTARTED
0x14c - Receive sequence started
events_txstarted: EVENTS_TXSTARTED
0x150 - Transmit sequence started
events_lastrx: EVENTS_LASTRX
0x15c - Byte boundary, starting to receive the last byte
events_lasttx: EVENTS_LASTTX
0x160 - Byte boundary, starting to transmit the last byte
publish_stopped: PUBLISH_STOPPED
0x184 - Publish configuration for event STOPPED
publish_error: PUBLISH_ERROR
0x1a4 - Publish configuration for event ERROR
publish_suspended: PUBLISH_SUSPENDED
0x1c8 - Publish configuration for event SUSPENDED
publish_rxstarted: PUBLISH_RXSTARTED
0x1cc - Publish configuration for event RXSTARTED
publish_txstarted: PUBLISH_TXSTARTED
0x1d0 - Publish configuration for event TXSTARTED
publish_lastrx: PUBLISH_LASTRX
0x1dc - Publish configuration for event LASTRX
publish_lasttx: PUBLISH_LASTTX
0x1e0 - Publish configuration for event LASTTX
shorts: SHORTS
0x200 - Shortcuts between local events and tasks
inten: INTEN
0x300 - Enable or disable interrupt
intenset: INTENSET
0x304 - Enable interrupt
intenclr: INTENCLR
0x308 - Disable interrupt
errorsrc: ERRORSRC
0x4c4 - Error source
enable: ENABLE
0x500 - Enable TWIM
psel: PSEL
0x508 - Unspecified
frequency: FREQUENCY
0x524 - TWI frequency. Accuracy depends on the HFCLK source selected.
rxd: RXD
0x534 - RXD EasyDMA channel
txd: TXD
0x544 - TXD EasyDMA channel
address: ADDRESS
0x588 - Address used in the TWI transfer
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