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#[doc = r" Value read from the register"] pub struct R { bits: u32, } #[doc = r" Value to write to the register"] pub struct W { bits: u32, } impl super::MODE { #[doc = r" Modifies the contents of the register"] #[inline] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); let r = R { bits: bits }; let mut w = W { bits: bits }; f(&r, &mut w); self.register.set(w.bits); } #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r" Writes to the register"] #[inline] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { let mut w = W::reset_value(); f(&mut w); self.register.set(w.bits); } #[doc = r" Writes the reset value to the register"] #[inline] pub fn reset(&self) { self.write(|w| w) } } #[doc = "Possible values of the field `MODE`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum MODER { #[doc = "Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx."] MASTER, #[doc = "Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx"] SLAVE, } impl MODER { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { MODER::MASTER => false, MODER::SLAVE => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> MODER { match value { false => MODER::MASTER, true => MODER::SLAVE, } } #[doc = "Checks if the value of the field is `MASTER`"] #[inline] pub fn is_master(&self) -> bool { *self == MODER::MASTER } #[doc = "Checks if the value of the field is `SLAVE`"] #[inline] pub fn is_slave(&self) -> bool { *self == MODER::SLAVE } } #[doc = "Values that can be written to the field `MODE`"] pub enum MODEW { #[doc = "Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx."] MASTER, #[doc = "Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx"] SLAVE, } impl MODEW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { MODEW::MASTER => false, MODEW::SLAVE => true, } } } #[doc = r" Proxy"] pub struct _MODEW<'a> { w: &'a mut W, } impl<'a> _MODEW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: MODEW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx."] #[inline] pub fn master(self) -> &'a mut W { self.variant(MODEW::MASTER) } #[doc = "Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx"] #[inline] pub fn slave(self) -> &'a mut W { self.variant(MODEW::SLAVE) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 0; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 0 - I2S mode."] #[inline] pub fn mode(&self) -> MODER { MODER::_from({ const MASK: bool = true; const OFFSET: u8 = 0; ((self.bits >> OFFSET) & MASK as u32) != 0 }) } } impl W { #[doc = r" Reset value of the register"] #[inline] pub fn reset_value() -> W { W { bits: 0 } } #[doc = r" Writes raw bits to the register"] #[inline] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 0 - I2S mode."] #[inline] pub fn mode(&mut self) -> _MODEW { _MODEW { w: self } } }