Struct nrf52840_hal::pac::radio::intenclr::R

pub struct R(/* private fields */);

Register INTENCLR reader

Implementations

impl R

pub fn ready(&self) -> BitReaderRaw<READY_A>

Bit 0 - Write ‘1’ to disable interrupt for READY event

pub fn address(&self) -> BitReaderRaw<ADDRESS_A>

Bit 1 - Write ‘1’ to disable interrupt for ADDRESS event

pub fn payload(&self) -> BitReaderRaw<PAYLOAD_A>

Bit 2 - Write ‘1’ to disable interrupt for PAYLOAD event

pub fn end(&self) -> BitReaderRaw<END_A>

Bit 3 - Write ‘1’ to disable interrupt for END event

pub fn disabled(&self) -> BitReaderRaw<DISABLED_A>

Bit 4 - Write ‘1’ to disable interrupt for DISABLED event

pub fn devmatch(&self) -> BitReaderRaw<DEVMATCH_A>

Bit 5 - Write ‘1’ to disable interrupt for DEVMATCH event

pub fn devmiss(&self) -> BitReaderRaw<DEVMISS_A>

Bit 6 - Write ‘1’ to disable interrupt for DEVMISS event

pub fn rssiend(&self) -> BitReaderRaw<RSSIEND_A>

Bit 7 - Write ‘1’ to disable interrupt for RSSIEND event

pub fn bcmatch(&self) -> BitReaderRaw<BCMATCH_A>

Bit 10 - Write ‘1’ to disable interrupt for BCMATCH event

pub fn crcok(&self) -> BitReaderRaw<CRCOK_A>

Bit 12 - Write ‘1’ to disable interrupt for CRCOK event

pub fn crcerror(&self) -> BitReaderRaw<CRCERROR_A>

Bit 13 - Write ‘1’ to disable interrupt for CRCERROR event

pub fn framestart(&self) -> BitReaderRaw<FRAMESTART_A>

Bit 14 - Write ‘1’ to disable interrupt for FRAMESTART event

pub fn edend(&self) -> BitReaderRaw<EDEND_A>

Bit 15 - Write ‘1’ to disable interrupt for EDEND event

pub fn edstopped(&self) -> BitReaderRaw<EDSTOPPED_A>

Bit 16 - Write ‘1’ to disable interrupt for EDSTOPPED event

pub fn ccaidle(&self) -> BitReaderRaw<CCAIDLE_A>

Bit 17 - Write ‘1’ to disable interrupt for CCAIDLE event

pub fn ccabusy(&self) -> BitReaderRaw<CCABUSY_A>

Bit 18 - Write ‘1’ to disable interrupt for CCABUSY event

pub fn ccastopped(&self) -> BitReaderRaw<CCASTOPPED_A>

Bit 19 - Write ‘1’ to disable interrupt for CCASTOPPED event

pub fn rateboost(&self) -> BitReaderRaw<RATEBOOST_A>

Bit 20 - Write ‘1’ to disable interrupt for RATEBOOST event

pub fn txready(&self) -> BitReaderRaw<TXREADY_A>

Bit 21 - Write ‘1’ to disable interrupt for TXREADY event

pub fn rxready(&self) -> BitReaderRaw<RXREADY_A>

Bit 22 - Write ‘1’ to disable interrupt for RXREADY event

pub fn mhrmatch(&self) -> BitReaderRaw<MHRMATCH_A>

Bit 23 - Write ‘1’ to disable interrupt for MHRMATCH event

pub fn phyend(&self) -> BitReaderRaw<PHYEND_A>

Bit 27 - Write ‘1’ to disable interrupt for PHYEND event

Methods from Deref<Target = R<INTENCLR_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<INTENCLR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<INTENCLR_SPEC>> for R

fn from(reader: R<INTENCLR_SPEC>) -> R

Converts to this type from the input type.